From 33cc3f81c1f5475b62332262bec3b816b9d8202e Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Wed, 1 Jan 2014 22:29:43 +0000 Subject: Remove the 's' DataLayout specification During the years there have been some attempts at figuring out how to align byval arguments. A look at the commit log suggests that they were * Use the ABI alignment. * When that was not sufficient for x86-64, I added the 's' specification to DataLayout. * When that was not sufficient Evan added the virtual getByValTypeAlignment. * When even that was not sufficient, we just got the FE to add the alignment to the byval. This patch is just a simple cleanup that removes my first attempt at fixing the problem. I also added an AArch64 implementation of getByValTypeAlignment to make sure this patch is a nop. I also left the 's' parsing for backward compatibility. I will send a short email to llvmdev about the change for anyone maintaining an out of tree target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198287 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/LangRef.rst | 3 --- include/llvm/IR/DataLayout.h | 7 +------ lib/CodeGen/TargetLoweringBase.cpp | 2 +- lib/IR/DataLayout.cpp | 16 +++++----------- lib/Target/AArch64/AArch64ISelLowering.cpp | 6 ++++++ lib/Target/AArch64/AArch64ISelLowering.h | 2 ++ lib/Target/AArch64/AArch64TargetMachine.cpp | 2 +- lib/Target/Target.cpp | 2 +- lib/Target/X86/X86TargetMachine.cpp | 4 ---- 9 files changed, 17 insertions(+), 27 deletions(-) diff --git a/docs/LangRef.rst b/docs/LangRef.rst index d2bc6a0583..c9ea23af7a 100644 --- a/docs/LangRef.rst +++ b/docs/LangRef.rst @@ -1160,9 +1160,6 @@ as follows: ``a::`` This specifies the alignment for an aggregate type of a given bit ````. -``s::`` - This specifies the alignment for a stack object of a given bit - ````. ``n::...`` This specifies a set of native integer widths for the target CPU in bits. For example, it might contain ``n32`` for 32-bit PowerPC, diff --git a/include/llvm/IR/DataLayout.h b/include/llvm/IR/DataLayout.h index a2a34f74ad..a1776fbf9b 100644 --- a/include/llvm/IR/DataLayout.h +++ b/include/llvm/IR/DataLayout.h @@ -45,8 +45,7 @@ enum AlignTypeEnum { INTEGER_ALIGN = 'i', ///< Integer type alignment VECTOR_ALIGN = 'v', ///< Vector type alignment FLOAT_ALIGN = 'f', ///< Floating point type alignment - AGGREGATE_ALIGN = 'a', ///< Aggregate alignment - STACK_ALIGN = 's' ///< Stack objects alignment + AGGREGATE_ALIGN = 'a' ///< Aggregate alignment }; /// Layout alignment element. @@ -344,10 +343,6 @@ public: /// an integer type of the specified bitwidth. unsigned getABIIntegerTypeAlignment(unsigned BitWidth) const; - /// getCallFrameTypeAlignment - Return the minimum ABI-required alignment - /// for the specified type when it is part of a call frame. - unsigned getCallFrameTypeAlignment(Type *Ty) const; - /// getPrefTypeAlignment - Return the preferred stack/global alignment for /// the specified type. This is always at least as good as the ABI alignment. unsigned getPrefTypeAlignment(Type *Ty) const; diff --git a/lib/CodeGen/TargetLoweringBase.cpp b/lib/CodeGen/TargetLoweringBase.cpp index 1ab198428a..7b1931d407 100644 --- a/lib/CodeGen/TargetLoweringBase.cpp +++ b/lib/CodeGen/TargetLoweringBase.cpp @@ -1285,7 +1285,7 @@ void llvm::GetReturnInfo(Type* ReturnType, AttributeSet attr, /// function arguments in the caller parameter area. This is the actual /// alignment, not its logarithm. unsigned TargetLoweringBase::getByValTypeAlignment(Type *Ty) const { - return TD->getCallFrameTypeAlignment(Ty); + return TD->getABITypeAlignment(Ty); } //===----------------------------------------------------------------------===// diff --git a/lib/IR/DataLayout.cpp b/lib/IR/DataLayout.cpp index a22588628f..0b52f1e95f 100644 --- a/lib/IR/DataLayout.cpp +++ b/lib/IR/DataLayout.cpp @@ -225,6 +225,10 @@ void DataLayout::parseSpecifier(StringRef Desc) { Tok = Tok.substr(1); switch (Specifier) { + case 's': + // Ignored for backward compatibility. + // FIXME: remove this on LLVM 4.0. + break; case 'E': LittleEndian = false; break; @@ -259,8 +263,7 @@ void DataLayout::parseSpecifier(StringRef Desc) { case 'i': case 'v': case 'f': - case 'a': - case 's': { + case 'a': { AlignTypeEnum AlignType; switch (Specifier) { default: @@ -268,7 +271,6 @@ void DataLayout::parseSpecifier(StringRef Desc) { case 'v': AlignType = VECTOR_ALIGN; break; case 'f': AlignType = FLOAT_ALIGN; break; case 'a': AlignType = AGGREGATE_ALIGN; break; - case 's': AlignType = STACK_ALIGN; break; } // Bit size. @@ -617,14 +619,6 @@ unsigned DataLayout::getABIIntegerTypeAlignment(unsigned BitWidth) const { return getAlignmentInfo(INTEGER_ALIGN, BitWidth, true, 0); } -unsigned DataLayout::getCallFrameTypeAlignment(Type *Ty) const { - for (unsigned i = 0, e = Alignments.size(); i != e; ++i) - if (Alignments[i].AlignType == STACK_ALIGN) - return Alignments[i].ABIAlign; - - return getABITypeAlignment(Ty); -} - unsigned DataLayout::getPrefTypeAlignment(Type *Ty) const { return getAlignment(Ty, false); } diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp index 548e76e521..882b5280fa 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -1346,6 +1346,12 @@ AArch64TargetLowering::LowerReturn(SDValue Chain, &RetOps[0], RetOps.size()); } +unsigned AArch64TargetLowering::getByValTypeAlignment(Type *Ty) const { + // This is a new backend. For anything more precise than this a FE should + // set an explicit alignment. + return 4; +} + SDValue AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI, SmallVectorImpl &InVals) const { diff --git a/lib/Target/AArch64/AArch64ISelLowering.h b/lib/Target/AArch64/AArch64ISelLowering.h index 358b5a1b21..f9ed6310d7 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.h +++ b/lib/Target/AArch64/AArch64ISelLowering.h @@ -221,6 +221,8 @@ public: const SmallVectorImpl &OutVals, SDLoc dl, SelectionDAG &DAG) const; + virtual unsigned getByValTypeAlignment(Type *Ty) const LLVM_OVERRIDE; + SDValue LowerCall(CallLoweringInfo &CLI, SmallVectorImpl &InVals) const; diff --git a/lib/Target/AArch64/AArch64TargetMachine.cpp b/lib/Target/AArch64/AArch64TargetMachine.cpp index 2617b2a416..aee3833b50 100644 --- a/lib/Target/AArch64/AArch64TargetMachine.cpp +++ b/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -34,7 +34,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT, : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), Subtarget(TT, CPU, FS), InstrInfo(Subtarget), - DL("e-i64:64-i128:128-s:32-n32:64-S128"), + DL("e-i64:64-i128:128-n32:64-S128"), TLInfo(*this), TSInfo(*this), FrameLowering(Subtarget) { diff --git a/lib/Target/Target.cpp b/lib/Target/Target.cpp index 2190198d8c..f6cd258d81 100644 --- a/lib/Target/Target.cpp +++ b/lib/Target/Target.cpp @@ -113,7 +113,7 @@ unsigned LLVMABIAlignmentOfType(LLVMTargetDataRef TD, LLVMTypeRef Ty) { } unsigned LLVMCallFrameAlignmentOfType(LLVMTargetDataRef TD, LLVMTypeRef Ty) { - return unwrap(TD)->getCallFrameTypeAlignment(unwrap(Ty)); + return unwrap(TD)->getABITypeAlignment(unwrap(Ty)); } unsigned LLVMPreferredAlignmentOfType(LLVMTargetDataRef TD, LLVMTypeRef Ty) { diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 04c1d7ebb9..773d702a6b 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -53,10 +53,6 @@ static std::string computeDataLayout(const X86Subtarget &ST) { else Ret += "-f80:32"; - // Objects on the stack ore aligned to 64 bits. - if (ST.is64Bit()) - Ret += "-s:64"; - // The registers can hold 8, 16, 32 or, in x86-64, 64 bits. if (ST.is64Bit()) Ret += "-n8:16:32:64"; -- cgit v1.2.3