From 4964ba01f96d5b3a8fb27a7847c01666ee9b4ebd Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sat, 7 Jan 2012 04:07:22 +0000 Subject: Use getRegForValue() to materialize the address of ARM globals. This enables basic local CSE, giving us 20% smaller code for consumer-typeset in -O0 builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147720 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMFastISel.cpp | 10 ---------- test/CodeGen/ARM/fast-isel-intrinsic.ll | 26 ++++++++++---------------- test/CodeGen/ARM/fast-isel.ll | 18 ++++++------------ 3 files changed, 16 insertions(+), 38 deletions(-) diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 56e3d49530..9b056d703c 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -865,16 +865,6 @@ bool ARMFastISel::ARMComputeAddress(const Value *Obj, Address &Addr) { } } - // Materialize the global variable's address into a reg which can - // then be used later to load the variable. - if (const GlobalValue *GV = dyn_cast(Obj)) { - unsigned Tmp = ARMMaterializeGV(GV, TLI.getValueType(Obj->getType())); - if (Tmp == 0) return false; - - Addr.Base.Reg = Tmp; - return true; - } - // Try to get this in a register if nothing else has worked. if (Addr.Base.Reg == 0) Addr.Base.Reg = getRegForValue(Obj); return Addr.Base.Reg != 0; diff --git a/test/CodeGen/ARM/fast-isel-intrinsic.ll b/test/CodeGen/ARM/fast-isel-intrinsic.ll index 5bc35eea1e..e6bdfa78d4 100644 --- a/test/CodeGen/ARM/fast-isel-intrinsic.ll +++ b/test/CodeGen/ARM/fast-isel-intrinsic.ll @@ -86,27 +86,21 @@ define void @t4() nounwind ssp { ; ARM: movw r0, :lower16:L_temp$non_lazy_ptr ; ARM: movt r0, :upper16:L_temp$non_lazy_ptr ; ARM: ldr r0, [r0] -; ARM: movw r1, :lower16:L_temp$non_lazy_ptr -; ARM: movt r1, :upper16:L_temp$non_lazy_ptr -; ARM: ldr r1, [r1] -; ARM: ldr r2, [r1, #16] -; ARM: str r2, [r0, #4] -; ARM: ldr r2, [r1, #20] -; ARM: str r2, [r0, #8] -; ARM: ldrh r1, [r1, #24] +; ARM: ldr r1, [r0, #16] +; ARM: str r1, [r0, #4] +; ARM: ldr r1, [r0, #20] +; ARM: str r1, [r0, #8] +; ARM: ldrh r1, [r0, #24] ; ARM: strh r1, [r0, #12] ; ARM: bx lr ; THUMB: movw r0, :lower16:L_temp$non_lazy_ptr ; THUMB: movt r0, :upper16:L_temp$non_lazy_ptr ; THUMB: ldr r0, [r0] -; THUMB: movw r1, :lower16:L_temp$non_lazy_ptr -; THUMB: movt r1, :upper16:L_temp$non_lazy_ptr -; THUMB: ldr r1, [r1] -; THUMB: ldr r2, [r1, #16] -; THUMB: str r2, [r0, #4] -; THUMB: ldr r2, [r1, #20] -; THUMB: str r2, [r0, #8] -; THUMB: ldrh r1, [r1, #24] +; THUMB: ldr r1, [r0, #16] +; THUMB: str r1, [r0, #4] +; THUMB: ldr r1, [r0, #20] +; THUMB: str r1, [r0, #8] +; THUMB: ldrh r1, [r0, #24] ; THUMB: strh r1, [r0, #12] ; THUMB: bx lr call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false) diff --git a/test/CodeGen/ARM/fast-isel.ll b/test/CodeGen/ARM/fast-isel.ll index c8e0211c60..905543a54c 100644 --- a/test/CodeGen/ARM/fast-isel.ll +++ b/test/CodeGen/ARM/fast-isel.ll @@ -145,22 +145,16 @@ define void @test4() { ; THUMB: movw r0, :lower16:L_test4g$non_lazy_ptr ; THUMB: movt r0, :upper16:L_test4g$non_lazy_ptr ; THUMB: ldr r0, [r0] -; THUMB: ldr r0, [r0] -; THUMB: adds r0, #1 -; THUMB: movw r1, :lower16:L_test4g$non_lazy_ptr -; THUMB: movt r1, :upper16:L_test4g$non_lazy_ptr -; THUMB: ldr r1, [r1] -; THUMB: str r0, [r1] +; THUMB: ldr r1, [r0] +; THUMB: adds r1, #1 +; THUMB: str r1, [r0] ; ARM: movw r0, :lower16:L_test4g$non_lazy_ptr ; ARM: movt r0, :upper16:L_test4g$non_lazy_ptr ; ARM: ldr r0, [r0] -; ARM: ldr r0, [r0] -; ARM: add r0, r0, #1 -; ARM: movw r1, :lower16:L_test4g$non_lazy_ptr -; ARM: movt r1, :upper16:L_test4g$non_lazy_ptr -; ARM: ldr r1, [r1] -; ARM: str r0, [r1] +; ARM: ldr r1, [r0] +; ARM: add r1, r1, #1 +; ARM: str r1, [r0] } ; Check unaligned stores -- cgit v1.2.3