From 76c5897eae2c60c66bb3a6d71b2971141978c2f5 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 27 Apr 2012 07:11:58 +0000 Subject: Add mcpu to tests to prevent them from using AVX instructions on Sandy Bridge after r155618. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155696 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/2006-05-11-InstrSched.ll | 2 +- test/CodeGen/X86/2009-02-26-MachineLICMBug.ll | 4 ++-- test/CodeGen/X86/2011-12-15-vec_shift.ll | 4 ++-- test/CodeGen/X86/break-sse-dep.ll | 4 ++-- test/CodeGen/X86/gather-addresses.ll | 4 ++-- test/CodeGen/X86/illegal-vector-args-return.ll | 8 ++++---- test/CodeGen/X86/lsr-reuse-trunc.ll | 4 ++-- test/CodeGen/X86/multiple-loop-post-inc.ll | 2 +- test/CodeGen/X86/pmul.ll | 2 +- test/CodeGen/X86/sink-hoist.ll | 2 +- test/CodeGen/X86/splat-scalar-load.ll | 2 +- test/CodeGen/X86/sse-align-12.ll | 2 +- test/CodeGen/X86/sse-domains.ll | 2 +- test/CodeGen/X86/sse-minmax.ll | 6 +++--- test/CodeGen/X86/sse41.ll | 4 ++-- test/CodeGen/X86/twoaddr-coalesce-2.ll | 2 +- test/CodeGen/X86/vec_insert-6.ll | 4 ++-- test/CodeGen/X86/vec_set-3.ll | 2 +- test/CodeGen/X86/vec_shuffle-16.ll | 4 ++-- test/CodeGen/X86/vec_shuffle-19.ll | 2 +- test/CodeGen/X86/vec_shuffle-27.ll | 4 ++-- test/CodeGen/X86/vec_shuffle-36.ll | 2 +- test/CodeGen/X86/vec_shuffle-37.ll | 4 ++-- test/CodeGen/X86/vec_shuffle-39.ll | 2 +- test/CodeGen/X86/vec_splat-2.ll | 2 +- test/CodeGen/X86/vec_splat-3.ll | 2 +- test/CodeGen/X86/vec_splat-4.ll | 2 +- test/CodeGen/X86/vec_splat.ll | 4 ++-- test/CodeGen/X86/widen_cast-2.ll | 2 +- test/CodeGen/X86/widen_conv-4.ll | 2 +- test/CodeGen/X86/widen_extract-1.ll | 2 +- test/CodeGen/X86/x86-64-dead-stack-adjust.ll | 4 ++-- 32 files changed, 49 insertions(+), 49 deletions(-) diff --git a/test/CodeGen/X86/2006-05-11-InstrSched.ll b/test/CodeGen/X86/2006-05-11-InstrSched.ll index 38bca283b1..d47840e866 100644 --- a/test/CodeGen/X86/2006-05-11-InstrSched.ll +++ b/test/CodeGen/X86/2006-05-11-InstrSched.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 -stats -realign-stack=0 |&\ +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=+sse2 -stats -realign-stack=0 |&\ ; RUN: grep {asm-printer} | grep 35 target datalayout = "e-p:32:32" diff --git a/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll index 0b5b7bdd94..8ac2b4e051 100644 --- a/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll +++ b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -stats |& grep {8 machine-licm} -; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn -stats |& grep {8 machine-licm} +; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn | FileCheck %s ; rdar://6627786 ; rdar://7792037 diff --git a/test/CodeGen/X86/2011-12-15-vec_shift.ll b/test/CodeGen/X86/2011-12-15-vec_shift.ll index 6f9188c442..dc3a08bb4d 100644 --- a/test/CodeGen/X86/2011-12-15-vec_shift.ll +++ b/test/CodeGen/X86/2011-12-15-vec_shift.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=x86-64 -mattr=+sse41 < %s | FileCheck %s -check-prefix=CHECK-W-SSE4 -; RUN: llc -march=x86-64 -mattr=-sse41 < %s | FileCheck %s -check-prefix=CHECK-WO-SSE4 +; RUN: llc -march=x86-64 -mattr=+sse41 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-W-SSE4 +; RUN: llc -march=x86-64 -mattr=-sse41 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-WO-SSE4 ; Test case for r146671 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.7" diff --git a/test/CodeGen/X86/break-sse-dep.ll b/test/CodeGen/X86/break-sse-dep.ll index 2dee575425..3e65867143 100644 --- a/test/CodeGen/X86/break-sse-dep.ll +++ b/test/CodeGen/X86/break-sse-dep.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse2 | FileCheck %s -; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse2 -mcpu=nehalem | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse2 -mcpu=nehalem | FileCheck %s define double @t1(float* nocapture %x) nounwind readonly ssp { entry: diff --git a/test/CodeGen/X86/gather-addresses.ll b/test/CodeGen/X86/gather-addresses.ll index 4a6927f6a2..72a50961b2 100644 --- a/test/CodeGen/X86/gather-addresses.ll +++ b/test/CodeGen/X86/gather-addresses.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s -; RUN: llc -mtriple=x86_64-win32 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-linux -mcpu=nehalem < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-win32 -mcpu=nehalem < %s | FileCheck %s ; rdar://7398554 ; When doing vector gather-scatter index calculation with 32-bit indices, diff --git a/test/CodeGen/X86/illegal-vector-args-return.ll b/test/CodeGen/X86/illegal-vector-args-return.ll index cecf77af4d..b8a129d963 100644 --- a/test/CodeGen/X86/illegal-vector-args-return.ll +++ b/test/CodeGen/X86/illegal-vector-args-return.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {mulpd %xmm3, %xmm1} -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {mulpd %xmm2, %xmm0} -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {addps %xmm3, %xmm1} -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {addps %xmm2, %xmm0} +; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep {mulpd %xmm3, %xmm1} +; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep {mulpd %xmm2, %xmm0} +; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep {addps %xmm3, %xmm1} +; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep {addps %xmm2, %xmm0} define <4 x double> @foo(<4 x double> %x, <4 x double> %z) { %y = fmul <4 x double> %x, %z diff --git a/test/CodeGen/X86/lsr-reuse-trunc.ll b/test/CodeGen/X86/lsr-reuse-trunc.ll index 1f87089f80..276dab72f7 100644 --- a/test/CodeGen/X86/lsr-reuse-trunc.ll +++ b/test/CodeGen/X86/lsr-reuse-trunc.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=nehalem | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=nehalem | FileCheck %s ; Full strength reduction wouldn't reduce register pressure, so LSR should ; stick with indexing here. diff --git a/test/CodeGen/X86/multiple-loop-post-inc.ll b/test/CodeGen/X86/multiple-loop-post-inc.ll index 4f7e28ace3..7491190b01 100644 --- a/test/CodeGen/X86/multiple-loop-post-inc.ll +++ b/test/CodeGen/X86/multiple-loop-post-inc.ll @@ -1,4 +1,4 @@ -; RUN: llc -asm-verbose=false -disable-branch-fold -disable-code-place -disable-tail-duplicate -march=x86-64 < %s | FileCheck %s +; RUN: llc -asm-verbose=false -disable-branch-fold -disable-code-place -disable-tail-duplicate -march=x86-64 -mcpu=nehalem < %s | FileCheck %s ; rdar://7236213 ; Xfailed now that scheduler 2-address hack is disabled a lea is generated. diff --git a/test/CodeGen/X86/pmul.ll b/test/CodeGen/X86/pmul.ll index d8ed4c097e..024ce3c761 100644 --- a/test/CodeGen/X86/pmul.ll +++ b/test/CodeGen/X86/pmul.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse41 -stack-alignment=16 -join-physregs > %t +; RUN: llc < %s -march=x86 -mattr=sse41 -mcpu=nehalem -stack-alignment=16 -join-physregs > %t ; RUN: grep pmul %t | count 12 ; RUN: grep mov %t | count 11 diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll index 7957eb8496..649cd61ab7 100644 --- a/test/CodeGen/X86/sink-hoist.ll +++ b/test/CodeGen/X86/sink-hoist.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true | FileCheck %s ; Currently, floating-point selects are lowered to CFG triangles. ; This means that one side of the select is always unconditionally diff --git a/test/CodeGen/X86/splat-scalar-load.ll b/test/CodeGen/X86/splat-scalar-load.ll index 81a072fb39..980f18c8b9 100644 --- a/test/CodeGen/X86/splat-scalar-load.ll +++ b/test/CodeGen/X86/splat-scalar-load.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -mcpu=nehalem | FileCheck %s ; rdar://7434544 define <2 x i64> @t2() nounwind { diff --git a/test/CodeGen/X86/sse-align-12.ll b/test/CodeGen/X86/sse-align-12.ll index 118e393b7b..71a42f4db3 100644 --- a/test/CodeGen/X86/sse-align-12.ll +++ b/test/CodeGen/X86/sse-align-12.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -march=x86-64 -mcpu=nehalem | FileCheck %s ; CHECK: a: ; CHECK: movdqu diff --git a/test/CodeGen/X86/sse-domains.ll b/test/CodeGen/X86/sse-domains.ll index d1e07c8563..c99287bdfb 100644 --- a/test/CodeGen/X86/sse-domains.ll +++ b/test/CodeGen/X86/sse-domains.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc < %s -mcpu=nehalem | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.7" diff --git a/test/CodeGen/X86/sse-minmax.ll b/test/CodeGen/X86/sse-minmax.ll index 11124409f0..903b54ea6e 100644 --- a/test/CodeGen/X86/sse-minmax.ll +++ b/test/CodeGen/X86/sse-minmax.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86-64 -asm-verbose=false -join-physregs -promote-elements | FileCheck %s -; RUN: llc < %s -march=x86-64 -asm-verbose=false -join-physregs -enable-unsafe-fp-math -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=UNSAFE %s -; RUN: llc < %s -march=x86-64 -asm-verbose=false -join-physregs -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=FINITE %s +; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false -join-physregs -promote-elements | FileCheck %s +; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false -join-physregs -enable-unsafe-fp-math -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=UNSAFE %s +; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false -join-physregs -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=FINITE %s ; Some of these patterns can be matched as SSE min or max. Some of ; then can be matched provided that the operands are swapped. diff --git a/test/CodeGen/X86/sse41.ll b/test/CodeGen/X86/sse41.ll index 54264b16ae..c6f9f0c873 100644 --- a/test/CodeGen/X86/sse41.ll +++ b/test/CodeGen/X86/sse41.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X32 -; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse41 -mcpu=penryn | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse41 -mcpu=penryn | FileCheck %s -check-prefix=X64 @g16 = external global i16 diff --git a/test/CodeGen/X86/twoaddr-coalesce-2.ll b/test/CodeGen/X86/twoaddr-coalesce-2.ll index 6f16a2548a..51ddc491aa 100644 --- a/test/CodeGen/X86/twoaddr-coalesce-2.ll +++ b/test/CodeGen/X86/twoaddr-coalesce-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -stats |& \ ; RUN: grep {twoaddrinstr} | grep {Number of instructions aggressively commuted} ; rdar://6480363 diff --git a/test/CodeGen/X86/vec_insert-6.ll b/test/CodeGen/X86/vec_insert-6.ll index de3b36ff12..2a4864a48a 100644 --- a/test/CodeGen/X86/vec_insert-6.ll +++ b/test/CodeGen/X86/vec_insert-6.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pslldq -; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -o /dev/null -stats -info-output-file - | grep asm-printer | grep 6 +; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn | grep pslldq +; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -mtriple=i686-apple-darwin9 -o /dev/null -stats -info-output-file - | grep asm-printer | grep 6 define <4 x float> @t3(<4 x float>* %P) nounwind { %tmp1 = load <4 x float>* %P diff --git a/test/CodeGen/X86/vec_set-3.ll b/test/CodeGen/X86/vec_set-3.ll index ada17e0092..d1d7608a04 100644 --- a/test/CodeGen/X86/vec_set-3.ll +++ b/test/CodeGen/X86/vec_set-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t +; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -o %t ; RUN: grep pshufd %t | count 2 define <4 x float> @test(float %a) nounwind { diff --git a/test/CodeGen/X86/vec_shuffle-16.ll b/test/CodeGen/X86/vec_shuffle-16.ll index 06f38ed842..09d4c1a64a 100644 --- a/test/CodeGen/X86/vec_shuffle-16.ll +++ b/test/CodeGen/X86/vec_shuffle-16.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+sse,-sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse -; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse2 +; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse,-sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse +; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse2 ; sse: t1: ; sse2: t1: diff --git a/test/CodeGen/X86/vec_shuffle-19.ll b/test/CodeGen/X86/vec_shuffle-19.ll index 861a1cc5b9..b26f920e5e 100644 --- a/test/CodeGen/X86/vec_shuffle-19.ll +++ b/test/CodeGen/X86/vec_shuffle-19.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -o /dev/null -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4 +; RUN: llc < %s -o /dev/null -march=x86 -mcpu=penryn -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4 ; PR2485 define <4 x i32> @t(<4 x i32> %a, <4 x i32> %b) nounwind { diff --git a/test/CodeGen/X86/vec_shuffle-27.ll b/test/CodeGen/X86/vec_shuffle-27.ll index dec98c7400..0aff822850 100644 --- a/test/CodeGen/X86/vec_shuffle-27.ll +++ b/test/CodeGen/X86/vec_shuffle-27.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse41 | FileCheck %s +; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=sse41 | FileCheck %s ; ModuleID = 'vec_shuffle-27.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" @@ -35,4 +35,4 @@ entry: store <4 x i64> %vect1487, <4 x i64>* %ap store <4 x i64> %vect1488, <4 x i64>* %bp ret void; -} \ No newline at end of file +} diff --git a/test/CodeGen/X86/vec_shuffle-36.ll b/test/CodeGen/X86/vec_shuffle-36.ll index 8090afc743..9a06015745 100644 --- a/test/CodeGen/X86/vec_shuffle-36.ll +++ b/test/CodeGen/X86/vec_shuffle-36.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=sse41 | FileCheck %s +; RUN: llc < %s -march=x86-64 -mcpu=penryn -mattr=sse41 | FileCheck %s define <8 x i16> @shuf6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { ; CHECK: pshufb diff --git a/test/CodeGen/X86/vec_shuffle-37.ll b/test/CodeGen/X86/vec_shuffle-37.ll index 430aa046af..ed285f93fe 100644 --- a/test/CodeGen/X86/vec_shuffle-37.ll +++ b/test/CodeGen/X86/vec_shuffle-37.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=core2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=core2 | FileCheck %s ; RUN: llc -O0 < %s -march=x86 -mcpu=core2 | FileCheck %s --check-prefix=CHECK_O0 define <4 x i32> @t00(<4 x i32>* %a0) nounwind ssp { diff --git a/test/CodeGen/X86/vec_shuffle-39.ll b/test/CodeGen/X86/vec_shuffle-39.ll index 55531e305c..ee8d2d5e0b 100644 --- a/test/CodeGen/X86/vec_shuffle-39.ll +++ b/test/CodeGen/X86/vec_shuffle-39.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn | FileCheck %s ; rdar://10050222, rdar://10134392 define <4 x float> @t1(<4 x float> %a, <1 x i64>* nocapture %p) nounwind { diff --git a/test/CodeGen/X86/vec_splat-2.ll b/test/CodeGen/X86/vec_splat-2.ll index cde5ae9956..f105de4d97 100644 --- a/test/CodeGen/X86/vec_splat-2.ll +++ b/test/CodeGen/X86/vec_splat-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd | count 1 +; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse2 | grep pshufd | count 1 define void @test(<2 x i64>* %P, i8 %x) nounwind { %tmp = insertelement <16 x i8> zeroinitializer, i8 %x, i32 0 ; <<16 x i8>> [#uses=1] diff --git a/test/CodeGen/X86/vec_splat-3.ll b/test/CodeGen/X86/vec_splat-3.ll index 649b85c5da..feacc42406 100644 --- a/test/CodeGen/X86/vec_splat-3.ll +++ b/test/CodeGen/X86/vec_splat-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse41 -o %t +; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=sse41 -o %t ; RUN: grep punpcklwd %t | count 4 ; RUN: grep punpckhwd %t | count 4 ; RUN: grep "pshufd" %t | count 8 diff --git a/test/CodeGen/X86/vec_splat-4.ll b/test/CodeGen/X86/vec_splat-4.ll index d9941e65bd..374acfa4e0 100644 --- a/test/CodeGen/X86/vec_splat-4.ll +++ b/test/CodeGen/X86/vec_splat-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse41 -o %t +; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=sse41 -o %t ; RUN: grep punpcklbw %t | count 16 ; RUN: grep punpckhbw %t | count 16 ; RUN: grep "pshufd" %t | count 16 diff --git a/test/CodeGen/X86/vec_splat.ll b/test/CodeGen/X86/vec_splat.ll index a87fbd0dc6..24d8487f17 100644 --- a/test/CodeGen/X86/vec_splat.ll +++ b/test/CodeGen/X86/vec_splat.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd -; RUN: llc < %s -march=x86 -mattr=+sse3 | grep movddup +; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse2 | grep pshufd +; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse3 | grep movddup define void @test_v4sf(<4 x float>* %P, <4 x float>* %Q, float %X) nounwind { %tmp = insertelement <4 x float> zeroinitializer, float %X, i32 0 ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/X86/widen_cast-2.ll b/test/CodeGen/X86/widen_cast-2.ll index 5c695ea000..3979ce466d 100644 --- a/test/CodeGen/X86/widen_cast-2.ll +++ b/test/CodeGen/X86/widen_cast-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s +; RUN: llc < %s -march=x86 -mcpu=nehalem -mattr=+sse42 | FileCheck %s ; CHECK: pextrd ; CHECK: pextrd ; CHECK: movd diff --git a/test/CodeGen/X86/widen_conv-4.ll b/test/CodeGen/X86/widen_conv-4.ll index affd796ffc..1158e04553 100644 --- a/test/CodeGen/X86/widen_conv-4.ll +++ b/test/CodeGen/X86/widen_conv-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s +; RUN: llc < %s -march=x86 -mcpu=nehalem -mattr=+sse42 | FileCheck %s ; CHECK-NOT: cvtsi2ss ; unsigned to float v7i16 to v7f32 diff --git a/test/CodeGen/X86/widen_extract-1.ll b/test/CodeGen/X86/widen_extract-1.ll index 4bcac58f2b..86727421ce 100644 --- a/test/CodeGen/X86/widen_extract-1.ll +++ b/test/CodeGen/X86/widen_extract-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s +; RUN: llc < %s -march=x86-64 -mcpu=nehalem -mattr=+sse42 | FileCheck %s ; widen extract subvector define void @convert(<2 x double>* %dst.addr, <3 x double> %src) { diff --git a/test/CodeGen/X86/x86-64-dead-stack-adjust.ll b/test/CodeGen/X86/x86-64-dead-stack-adjust.ll index 79316f29de..902c9d5ae0 100644 --- a/test/CodeGen/X86/x86-64-dead-stack-adjust.ll +++ b/test/CodeGen/X86/x86-64-dead-stack-adjust.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s | not grep rsp -; RUN: llc < %s | grep cvttsd2siq +; RUN: llc < %s -mcpu=nehalem | not grep rsp +; RUN: llc < %s -mcpu=nehalem | grep cvttsd2siq target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin8" -- cgit v1.2.3