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| author | Bill Wendling <isanbard@gmail.com> | 2013-05-15 21:06:54 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2013-05-15 21:06:54 +0000 |
| commit | 39f229fdd3084dc995a1b45d94cde435c3a0a180 (patch) | |
| tree | 0783bc0ea824e9b18c5944d39df2a7d368191a18 | |
| parent | f13140f28618c26e2698d8026d86849f2ec0edfb (diff) | |
| download | clang-39f229fdd3084dc995a1b45d94cde435c3a0a180.tar.gz clang-39f229fdd3084dc995a1b45d94cde435c3a0a180.tar.bz2 clang-39f229fdd3084dc995a1b45d94cde435c3a0a180.tar.xz | |
Merging r181728:
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r181728 | rafael | 2013-05-13 13:09:47 -0700 (Mon, 13 May 2013) | 6 lines
Use atomic instructions on ARM linux.
This is safe given how the pre-v6 atomic ops funcions in libgcc are
implemented.
This fixes pr15429.
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git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_33@181919 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Basic/Targets.cpp | 17 | ||||
| -rw-r--r-- | test/CodeGen/linux-arm-atomic.c | 10 |
2 files changed, 26 insertions, 1 deletions
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp index 96b12bac1f..841ca62ab6 100644 --- a/lib/Basic/Targets.cpp +++ b/lib/Basic/Targets.cpp @@ -3527,6 +3527,20 @@ class ARMTargetInfo : public TargetInfo { static const Builtin::Info BuiltinInfo[]; + static bool shouldUseInlineAtomic(const llvm::Triple &T) { + // On linux, binaries targeting old cpus call functions in libgcc to + // perform atomic operations. The implementation in libgcc then calls into + // the kernel which on armv6 and newer uses ldrex and strex. The net result + // is that if we assume the kernel is at least as recent as the hardware, + // it is safe to use atomic instructions on armv6 and newer. + if (T.getOS() != llvm::Triple::Linux) + return false; + StringRef ArchName = T.getArchName(); + if (ArchName.startswith("armv6") || ArchName.startswith("armv7")) + return true; + return false; + } + public: ARMTargetInfo(const std::string &TripleStr) : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s"), IsAAPCS(true) @@ -3559,8 +3573,9 @@ public: TheCXXABI.set(TargetCXXABI::GenericARM); // ARM has atomics up to 8 bytes - // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e MaxAtomicPromoteWidth = 64; + if (shouldUseInlineAtomic(getTriple())) + MaxAtomicInlineWidth = 64; // Do force alignment of members that follow zero length bitfields. If // the alignment of the zero-length bitfield is greater than the member diff --git a/test/CodeGen/linux-arm-atomic.c b/test/CodeGen/linux-arm-atomic.c new file mode 100644 index 0000000000..3fda7f688c --- /dev/null +++ b/test/CodeGen/linux-arm-atomic.c @@ -0,0 +1,10 @@ +// RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv7-unknown-linux | FileCheck %s +// RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv6-unknown-linux | FileCheck %s + +typedef int _Atomic_word; +_Atomic_word exchange_and_add(volatile _Atomic_word *__mem, int __val) { + return __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); +} + +// CHECK: define {{.*}} @exchange_and_add +// CHECK: atomicrmw {{.*}} add |