diff options
| author | Abdoulaye Walsimou Gaye <walsimou@walsimou.com> | 2009-04-20 13:51:00 +0200 |
|---|---|---|
| committer | Abdoulaye Walsimou Gaye <walsimou@walsimou.com> | 2009-04-20 13:54:06 +0200 |
| commit | 4db043974d2c37e3d1c978c3ccb307abae404b4f (patch) | |
| tree | b5edf702e626299aca94e6249eeb8451ff5400c9 | |
| parent | e689d5d217d3ccb259700047bf0f9bafcad1417d (diff) | |
| download | freertos-4db043974d2c37e3d1c978c3ccb307abae404b4f.tar.gz freertos-4db043974d2c37e3d1c978c3ccb307abae404b4f.tar.bz2 freertos-4db043974d2c37e3d1c978c3ccb307abae404b4f.tar.xz | |
PIC18_SDCC: Add .lkr files for supported devices
This patch adds linker script file for all supported devices
and modifies pic18memory.h accordingly.
Signed-off-by: Abdoulaye Walsimou Gaye <walsimou@walsimou.com>
56 files changed, 1134 insertions, 0 deletions
diff --git a/Demo/PIC18_SDCC/lkr/18f2510.lkr b/Demo/PIC18_SDCC/lkr/18f2510.lkr new file mode 100644 index 00000000..2cdffb24 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2510.lkr @@ -0,0 +1,16 @@ +// File: 18f2510.lkr +// Sample linker script for the PIC18F2510 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0x5FF +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f2515.lkr b/Demo/PIC18_SDCC/lkr/18f2515.lkr new file mode 100644 index 00000000..6fa916c8 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2515.lkr @@ -0,0 +1,16 @@ +// File: 18f2515.lkr +// Sample linker script for the PIC18F2515 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xBFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0xF7F +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f252.lkr b/Demo/PIC18_SDCC/lkr/18f252.lkr new file mode 100644 index 00000000..92629e10 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f252.lkr @@ -0,0 +1,17 @@ +// File: 18f252.lkr +// Sample linker script for the PIC18F252 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF000FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0x5FF +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f2520.lkr b/Demo/PIC18_SDCC/lkr/18f2520.lkr new file mode 100644 index 00000000..3d8f5256 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2520.lkr @@ -0,0 +1,17 @@ +// File: 18f2520.lkr +// Sample linker script for the PIC18F2520 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF000FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0x5FF +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f2523.lkr b/Demo/PIC18_SDCC/lkr/18f2523.lkr new file mode 100644 index 00000000..2acace21 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2523.lkr @@ -0,0 +1,17 @@ +// File: 18f2523.lkr +// Sample linker script for the PIC18F2523 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF000FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0x5FF +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f2525.lkr b/Demo/PIC18_SDCC/lkr/18f2525.lkr new file mode 100644 index 00000000..6bf45726 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2525.lkr @@ -0,0 +1,17 @@ +// File: 18f2525.lkr +// Sample linker script for the PIC18F2525 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xBFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0xF7F +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f258.lkr b/Demo/PIC18_SDCC/lkr/18f258.lkr new file mode 100644 index 00000000..2cb3db06 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f258.lkr @@ -0,0 +1,18 @@ +// File: 18f258.lkr +// Sample linker script for the PIC18F258 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF000FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0x5FF +DATABANK NAME=bankedsfr START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f2580.lkr b/Demo/PIC18_SDCC/lkr/18f2580.lkr new file mode 100644 index 00000000..45f268ec --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2580.lkr @@ -0,0 +1,20 @@ +// File: 18f2580.lkr +// Sample linker script for the PIC18F2580 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF000FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0x5FF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f2585.lkr b/Demo/PIC18_SDCC/lkr/18f2585.lkr new file mode 100644 index 00000000..f38a9d0f --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2585.lkr @@ -0,0 +1,20 @@ +// File: 18f2585.lkr +// Sample linker script for the PIC18F2585 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xBFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f25k20.lkr b/Demo/PIC18_SDCC/lkr/18f25k20.lkr new file mode 100644 index 00000000..33181523 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f25k20.lkr @@ -0,0 +1,17 @@ +// File: 18f25k20.lkr +// Sample linker script for the PIC18F25K20 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF000FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=BIGBLOCK START=0x60 END=0x5FF +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f2610.lkr b/Demo/PIC18_SDCC/lkr/18f2610.lkr new file mode 100644 index 00000000..3b139f6c --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2610.lkr @@ -0,0 +1,16 @@ +// File: 18f2610.lkr +// Sample linker script for the PIC18F2610 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0xF7F +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f2620.lkr b/Demo/PIC18_SDCC/lkr/18f2620.lkr new file mode 100644 index 00000000..83a8ad8c --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2620.lkr @@ -0,0 +1,17 @@ +// File: 18f2620.lkr +// Sample linker script for the PIC18F2620 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0xF7F +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f2680.lkr b/Demo/PIC18_SDCC/lkr/18f2680.lkr new file mode 100644 index 00000000..5e985606 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2680.lkr @@ -0,0 +1,20 @@ +// File: 18f2680.lkr +// Sample linker script for the PIC18F2680 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f2682.lkr b/Demo/PIC18_SDCC/lkr/18f2682.lkr new file mode 100644 index 00000000..d17a1f35 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2682.lkr @@ -0,0 +1,20 @@ +// File: 18f2682.lkr +// Sample linker script for the PIC18F2682 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x13FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f2685.lkr b/Demo/PIC18_SDCC/lkr/18f2685.lkr new file mode 100644 index 00000000..833b4601 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f2685.lkr @@ -0,0 +1,20 @@ +// File: 18f2685.lkr +// Sample linker script for the PIC18F2685 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x17FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f26k20.lkr b/Demo/PIC18_SDCC/lkr/18f26k20.lkr new file mode 100644 index 00000000..f78960b3 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f26k20.lkr @@ -0,0 +1,17 @@ +// File: 18f26k20.lkr +// Sample linker script for the PIC18F26K20 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xF5F +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f4510.lkr b/Demo/PIC18_SDCC/lkr/18f4510.lkr new file mode 100644 index 00000000..d18f1633 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f4510.lkr @@ -0,0 +1,16 @@ +// File: 18f4510.lkr +// Sample linker script for the PIC18F4510 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0x5FF +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f4515.lkr b/Demo/PIC18_SDCC/lkr/18f4515.lkr new file mode 100644 index 00000000..03daf12d --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f4515.lkr @@ -0,0 +1,16 @@ +// File: 18f4515.lkr +// Sample linker script for the PIC18F4515 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xBFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0xF7F +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f4523.lkr b/Demo/PIC18_SDCC/lkr/18f4523.lkr new file mode 100644 index 00000000..727163ce --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f4523.lkr @@ -0,0 +1,17 @@ +// File: 18f4523.lkr +// Sample linker script for the PIC18F4523 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF000FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0x5FF +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f4525.lkr b/Demo/PIC18_SDCC/lkr/18f4525.lkr new file mode 100644 index 00000000..3ab75085 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f4525.lkr @@ -0,0 +1,17 @@ +// File: 18f4525.lkr +// Sample linker script for the PIC18F4525 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xBFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0xF7F +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f458.lkr b/Demo/PIC18_SDCC/lkr/18f458.lkr new file mode 100644 index 00000000..75828a06 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f458.lkr @@ -0,0 +1,18 @@ +// File: 18f458.lkr +// Sample linker script for the PIC18F458 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF000FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0x5FF +DATABANK NAME=bankedsfr START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f4585.lkr b/Demo/PIC18_SDCC/lkr/18f4585.lkr new file mode 100644 index 00000000..326b115b --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f4585.lkr @@ -0,0 +1,20 @@ +// File: 18f4585.lkr +// Sample linker script for the PIC18F4585 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xBFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f45k20.lkr b/Demo/PIC18_SDCC/lkr/18f45k20.lkr new file mode 100644 index 00000000..0f44eca1 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f45k20.lkr @@ -0,0 +1,17 @@ +// File: 18f45k20.lkr +// Sample linker script for the PIC18F45K20 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF000FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=BIGBLOCK START=0x60 END=0x5FF +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f4610.lkr b/Demo/PIC18_SDCC/lkr/18f4610.lkr new file mode 100644 index 00000000..a5f11fb4 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f4610.lkr @@ -0,0 +1,16 @@ +// File: 18f4610.lkr +// Sample linker script for the PIC18F4610 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0xF7F +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f4620.lkr b/Demo/PIC18_SDCC/lkr/18f4620.lkr new file mode 100644 index 00000000..49f55ddf --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f4620.lkr @@ -0,0 +1,17 @@ +// File: 18f4620.lkr +// Sample linker script for the PIC18F4620 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x7F +DATABANK NAME=gpr0 START=0x80 END=0xF7F +ACCESSBANK NAME=accesssfr START=0xF80 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f4680.lkr b/Demo/PIC18_SDCC/lkr/18f4680.lkr new file mode 100644 index 00000000..ead99001 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f4680.lkr @@ -0,0 +1,20 @@ +// File: 18f4680.lkr +// Sample linker script for the PIC18F4680 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f4682.lkr b/Demo/PIC18_SDCC/lkr/18f4682.lkr new file mode 100644 index 00000000..269e9e49 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f4682.lkr @@ -0,0 +1,20 @@ +// File: 18f4682.lkr +// Sample linker script for the PIC18F4682 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x13FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f4685.lkr b/Demo/PIC18_SDCC/lkr/18f4685.lkr new file mode 100644 index 00000000..f774108d --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f4685.lkr @@ -0,0 +1,20 @@ +// File: 18f4685.lkr +// Sample linker script for the PIC18F4685 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x17FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f46k20.lkr b/Demo/PIC18_SDCC/lkr/18f46k20.lkr new file mode 100644 index 00000000..6080b67f --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f46k20.lkr @@ -0,0 +1,17 @@ +// File: 18f46k20.lkr +// Sample linker script for the PIC18F46K20 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xF5F +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f6520.lkr b/Demo/PIC18_SDCC/lkr/18f6520.lkr new file mode 100644 index 00000000..827756a8 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f6520.lkr @@ -0,0 +1,17 @@ +// File: 18f6520.lkr +// Sample linker script for the PIC18F6520 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0x7FF +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f6585.lkr b/Demo/PIC18_SDCC/lkr/18f6585.lkr new file mode 100644 index 00000000..603c201f --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f6585.lkr @@ -0,0 +1,20 @@ +// File: 18f6585.lkr +// Sample linker script for the PIC18F6585 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xBFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f65j50.lkr b/Demo/PIC18_SDCC/lkr/18f65j50.lkr new file mode 100644 index 00000000..194d83e7 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f65j50.lkr @@ -0,0 +1,16 @@ +// File: 18f65j50.lkr +// Sample linker script for the PIC18F65J50 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FF7 +CODEPAGE NAME=config START=0x7FF8 END=0x7FFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xF3F +DATABANK NAME=sfr15 START=0xF40 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f6620.lkr b/Demo/PIC18_SDCC/lkr/18f6620.lkr new file mode 100644 index 00000000..12d6dfb4 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f6620.lkr @@ -0,0 +1,17 @@ +// File: 18f6620.lkr +// Sample linker script for the PIC18F6620 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xEFF +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f6680.lkr b/Demo/PIC18_SDCC/lkr/18f6680.lkr new file mode 100644 index 00000000..255e2f50 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f6680.lkr @@ -0,0 +1,20 @@ +// File: 18f6680.lkr +// Sample linker script for the PIC18F6680 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f66j50.lkr b/Demo/PIC18_SDCC/lkr/18f66j50.lkr new file mode 100644 index 00000000..ec57c2ed --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f66j50.lkr @@ -0,0 +1,16 @@ +// File: 18f66j50.lkr +// Sample linker script for the PIC18F66J50 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFF7 +CODEPAGE NAME=config START=0xFFF8 END=0xFFFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xF3F +DATABANK NAME=sfr15 START=0xF40 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f66j55.lkr b/Demo/PIC18_SDCC/lkr/18f66j55.lkr new file mode 100644 index 00000000..2bc91b02 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f66j55.lkr @@ -0,0 +1,16 @@ +// File: 18f66j55.lkr +// Sample linker script for the PIC18F66J55 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x17FF7 +CODEPAGE NAME=config START=0x17FF8 END=0x17FFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xF3F +DATABANK NAME=sfr15 START=0xF40 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f66j60.lkr b/Demo/PIC18_SDCC/lkr/18f66j60.lkr new file mode 100644 index 00000000..f24dfc0d --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f66j60.lkr @@ -0,0 +1,17 @@ +// File: 18f66j60.lkr +// Sample linker script for the PIC18F66J60 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFF7 +CODEPAGE NAME=config START=0xFFF8 END=0xFFFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xE7F +DATABANK NAME=sfr14 START=0xE80 END=0xEFF PROTECTED +DATABANK NAME=gpr15 START=0xF00 END=0xF5F +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f66j65.lkr b/Demo/PIC18_SDCC/lkr/18f66j65.lkr new file mode 100644 index 00000000..42239231 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f66j65.lkr @@ -0,0 +1,17 @@ +// File: 18f66j65.lkr +// Sample linker script for the PIC18F66J65 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x17FF7 +CODEPAGE NAME=config START=0x17FF8 END=0x17FFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xE7F +DATABANK NAME=sfr14 START=0xE80 END=0xEFF PROTECTED +DATABANK NAME=gpr15 START=0xF00 END=0xF5F +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f6720.lkr b/Demo/PIC18_SDCC/lkr/18f6720.lkr new file mode 100644 index 00000000..9d399bdc --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f6720.lkr @@ -0,0 +1,17 @@ +// File: 18f6720.lkr +// Sample linker script for the PIC18F6720 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x1FFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xEFF +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f67j50.lkr b/Demo/PIC18_SDCC/lkr/18f67j50.lkr new file mode 100644 index 00000000..a8cbbaf7 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f67j50.lkr @@ -0,0 +1,16 @@ +// File: 18f67j50.lkr +// Sample linker script for the PIC18F67J50 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x1FFF7 +CODEPAGE NAME=config START=0x1FFF8 END=0x1FFFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xF3F +DATABANK NAME=sfr15 START=0xF40 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f67j60.lkr b/Demo/PIC18_SDCC/lkr/18f67j60.lkr new file mode 100644 index 00000000..46705413 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f67j60.lkr @@ -0,0 +1,17 @@ +// File: 18f67j60.lkr +// Sample linker script for the PIC18F67J60 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x1FFF7 +CODEPAGE NAME=config START=0x1FFF8 END=0x1FFFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xE7F +DATABANK NAME=sfr14 START=0xE80 END=0xEFF PROTECTED +DATABANK NAME=gpr15 START=0xF00 END=0xF5F +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f8520.lkr b/Demo/PIC18_SDCC/lkr/18f8520.lkr new file mode 100644 index 00000000..7ef10e1c --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f8520.lkr @@ -0,0 +1,17 @@ +// File: 18f8520.lkr +// Sample linker script for the PIC18F8520 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0x7FF +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f8585.lkr b/Demo/PIC18_SDCC/lkr/18f8585.lkr new file mode 100644 index 00000000..18da75c1 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f8585.lkr @@ -0,0 +1,20 @@ +// File: 18f8585.lkr +// Sample linker script for the PIC18F8585 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xBFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f85j50.lkr b/Demo/PIC18_SDCC/lkr/18f85j50.lkr new file mode 100644 index 00000000..e5d66b97 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f85j50.lkr @@ -0,0 +1,16 @@ +// File: 18f85j50.lkr +// Sample linker script for the PIC18F85J50 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x7FF7 +CODEPAGE NAME=config START=0x7FF8 END=0x7FFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xF3F +DATABANK NAME=sfr15 START=0xF40 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f8620.lkr b/Demo/PIC18_SDCC/lkr/18f8620.lkr new file mode 100644 index 00000000..e6b79ef4 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f8620.lkr @@ -0,0 +1,17 @@ +// File: 18f8620.lkr +// Sample linker script for the PIC18F8620 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xEFF +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f8680.lkr b/Demo/PIC18_SDCC/lkr/18f8680.lkr new file mode 100644 index 00000000..0a6d43ce --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f8680.lkr @@ -0,0 +1,20 @@ +// File: 18f8680.lkr +// Sample linker script for the PIC18F8680 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xCFF +DATABANK NAME=sfr13 START=0xD00 END=0xDFF PROTECTED +DATABANK NAME=sfr14 START=0xE00 END=0xEFF PROTECTED +DATABANK NAME=sfr15 START=0xF00 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f86j50.lkr b/Demo/PIC18_SDCC/lkr/18f86j50.lkr new file mode 100644 index 00000000..d95a4628 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f86j50.lkr @@ -0,0 +1,16 @@ +// File: 18f86j50.lkr +// Sample linker script for the PIC18F86J50 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFF7 +CODEPAGE NAME=config START=0xFFF8 END=0xFFFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xF3F +DATABANK NAME=sfr15 START=0xF40 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f86j55.lkr b/Demo/PIC18_SDCC/lkr/18f86j55.lkr new file mode 100644 index 00000000..31f91ebd --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f86j55.lkr @@ -0,0 +1,16 @@ +// File: 18f86j55.lkr +// Sample linker script for the PIC18F86J55 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x17FF7 +CODEPAGE NAME=config START=0x17FF8 END=0x17FFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xF3F +DATABANK NAME=sfr15 START=0xF40 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f86j60.lkr b/Demo/PIC18_SDCC/lkr/18f86j60.lkr new file mode 100644 index 00000000..99fff229 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f86j60.lkr @@ -0,0 +1,17 @@ +// File: 18f86j60.lkr +// Sample linker script for the PIC18F86J60 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFF7 +CODEPAGE NAME=config START=0xFFF8 END=0xFFFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xE7F +DATABANK NAME=sfr14 START=0xE80 END=0xEFF PROTECTED +DATABANK NAME=gpr15 START=0xF00 END=0xF5F +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f86j65.lkr b/Demo/PIC18_SDCC/lkr/18f86j65.lkr new file mode 100644 index 00000000..89bd06aa --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f86j65.lkr @@ -0,0 +1,17 @@ +// File: 18f86j65.lkr +// Sample linker script for the PIC18F86J65 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x17FF7 +CODEPAGE NAME=config START=0x17FF8 END=0x17FFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xE7F +DATABANK NAME=sfr14 START=0xE80 END=0xEFF PROTECTED +DATABANK NAME=gpr15 START=0xF00 END=0xF5F +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f8720.lkr b/Demo/PIC18_SDCC/lkr/18f8720.lkr new file mode 100644 index 00000000..26bdfbe6 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f8720.lkr @@ -0,0 +1,17 @@ +// File: 18f8720.lkr +// Sample linker script for the PIC18F8720 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x1FFFF +CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED +CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED +CODEPAGE NAME=eedata START=0xF00000 END=0xF003FF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xEFF +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f87j50.lkr b/Demo/PIC18_SDCC/lkr/18f87j50.lkr new file mode 100644 index 00000000..529d5980 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f87j50.lkr @@ -0,0 +1,16 @@ +// File: 18f87j50.lkr +// Sample linker script for the PIC18F87J50 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x1FFF7 +CODEPAGE NAME=config START=0x1FFF8 END=0x1FFFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xF3F +DATABANK NAME=sfr15 START=0xF40 END=0xF5F PROTECTED +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f87j60.lkr b/Demo/PIC18_SDCC/lkr/18f87j60.lkr new file mode 100644 index 00000000..9f9a8ea9 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f87j60.lkr @@ -0,0 +1,17 @@ +// File: 18f87j60.lkr +// Sample linker script for the PIC18F87J60 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x1FFF7 +CODEPAGE NAME=config START=0x1FFF8 END=0x1FFFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xE7F +DATABANK NAME=sfr14 START=0xE80 END=0xEFF PROTECTED +DATABANK NAME=gpr15 START=0xF00 END=0xF5F +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f96j60.lkr b/Demo/PIC18_SDCC/lkr/18f96j60.lkr new file mode 100644 index 00000000..29914854 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f96j60.lkr @@ -0,0 +1,17 @@ +// File: 18f96j60.lkr +// Sample linker script for the PIC18F96J60 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0xFFF7 +CODEPAGE NAME=config START=0xFFF8 END=0xFFFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xE7F +DATABANK NAME=sfr14 START=0xE80 END=0xEFF PROTECTED +DATABANK NAME=gpr15 START=0xF00 END=0xF5F +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Demo/PIC18_SDCC/lkr/18f96j65.lkr b/Demo/PIC18_SDCC/lkr/18f96j65.lkr new file mode 100644 index 00000000..29863391 --- /dev/null +++ b/Demo/PIC18_SDCC/lkr/18f96j65.lkr @@ -0,0 +1,17 @@ +// File: 18f96j65.lkr +// Sample linker script for the PIC18F96J65 processor + +// Not intended for use with MPLAB C18. For C18 projects, +// use the linker scripts provided with that product. + +LIBPATH . + +CODEPAGE NAME=page START=0x0 END=0x17FF7 +CODEPAGE NAME=config START=0x17FF8 END=0x17FFD PROTECTED +CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED + +ACCESSBANK NAME=accessram START=0x0 END=0x5F +DATABANK NAME=gpr0 START=0x60 END=0xE7F +DATABANK NAME=sfr14 START=0xE80 END=0xEFF PROTECTED +DATABANK NAME=gpr15 START=0xF00 END=0xF5F +ACCESSBANK NAME=accesssfr START=0xF60 END=0xFFF PROTECTED diff --git a/Source/portable/SDCC/PIC18/pic18memory.h b/Source/portable/SDCC/PIC18/pic18memory.h index 71281a3b..1efbb8ac 100644 --- a/Source/portable/SDCC/PIC18/pic18memory.h +++ b/Source/portable/SDCC/PIC18/pic18memory.h @@ -102,4 +102,176 @@ #define PIC18_SDCC_HEAP_SIZE 2560 #endif +#ifdef __18f86j55__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f86j60__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f86j66__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f87j50__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f87j60__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f96j60__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f96j65__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f97j60__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f252__ +#define PIC18_SDCC_HEAP_SIZE 1024 +#endif + +#ifdef __18f258__ +#define PIC18_SDCC_HEAP_SIZE 1024 +#endif + +#ifdef __18f458__ +#define PIC18_SDCC_HEAP_SIZE 1024 +#endif + +#ifdef __18f2510__ +#define PIC18_SDCC_HEAP_SIZE 1024 +#endif + +#ifdef __18f2515__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f2520__ +#define PIC18_SDCC_HEAP_SIZE 1024 +#endif + +#ifdef __18f2523__ +#define PIC18_SDCC_HEAP_SIZE 1024 +#endif + +#ifdef __18f2525__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f2580__ +#define PIC18_SDCC_HEAP_SIZE 1024 +#endif + +#ifdef __18f2585__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f2610__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f2620__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f2680__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f2682__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f2685__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f4510__ +#define PIC18_SDCC_HEAP_SIZE 1024 +#endif + +#ifdef __18f4515__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f4523__ +#define PIC18_SDCC_HEAP_SIZE 1024 +#endif + +#ifdef __18f4525__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f4585__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f4610__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f4620__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f4680__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f4682__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f4685__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f6520__ +#define PIC18_SDCC_HEAP_SIZE 1024 +#endif + +#ifdef __18f6585__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f6620__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f6680__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f6720__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f8520__ +#define PIC18_SDCC_HEAP_SIZE 1024 +#endif + +#ifdef __18f8585__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f8620__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + +#ifdef __18f8680__ +#define PIC18_SDCC_HEAP_SIZE 2048 +#endif + +#ifdef __18f8720__ +#define PIC18_SDCC_HEAP_SIZE 2560 +#endif + #endif /*PIC18RAM_H*/ |