From 5c9afb08bd4bd89637ab6cabf391826a78405ee2 Mon Sep 17 00:00:00 2001 From: richardbarry Date: Thu, 7 Aug 2008 18:51:34 +0000 Subject: Prepare for V2 port. git-svn-id: https://freertos.svn.sourceforge.net/svnroot/freertos/trunk@429 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- Source/portable/GCC/ColdFire_V2/mcf5xxx_lo.S | 402 +++++++++++++++++++++++++++ Source/portable/GCC/ColdFire_V2/port.c | 70 +++++ Source/portable/GCC/ColdFire_V2/portmacro.h | 135 +++++++++ 3 files changed, 607 insertions(+) create mode 100644 Source/portable/GCC/ColdFire_V2/mcf5xxx_lo.S create mode 100644 Source/portable/GCC/ColdFire_V2/port.c create mode 100644 Source/portable/GCC/ColdFire_V2/portmacro.h (limited to 'Source') diff --git a/Source/portable/GCC/ColdFire_V2/mcf5xxx_lo.S b/Source/portable/GCC/ColdFire_V2/mcf5xxx_lo.S new file mode 100644 index 00000000..ee7cf13d --- /dev/null +++ b/Source/portable/GCC/ColdFire_V2/mcf5xxx_lo.S @@ -0,0 +1,402 @@ + +/* + * File: mcf5xxx.s + * Purpose: Lowest level routines for all ColdFire processors. + * + * Notes: + * + * File provided by FreeScale. + */ + + .global french_cheese + + .text + +/******************************************************************** + * This routine is the lowest-level exception handler. + */ + /* +asm_exception_handler: +_asm_exception_handler: + lea -16(SP),SP + movem.l D0-D1/A0-A1,(SP) + lea 16(SP),A1 + move.l A1,-(SP) + jsr mcf5xxx_exception_handler + lea 4(SP),SP + movem.l (SP),D0-D1/A0-A1 + lea 16(SP),SP + rte + +/********************************************************************/ +/* + * This routines changes the IPL to the value passed into the routine. + * It also returns the old IPL value back. + * Calling convention from C: + * old_ipl = asm_set_ipl(new_ipl); + * For the Diab Data C compiler, it passes return value thru D0. + * Note that only the least significant three bits of the passed + * value are used. + */ + +french_cheese: + link A6,#-8 + movem.l D6-D7,(SP) + + move.w SR,D7 /* current sr */ + + move.l D7,D0 /* prepare return value */ + andi.l #0x0700,D0 /* mask out IPL */ + lsr.l #8,D0 /* IPL */ + + move.l 8(A6),D6 /* get argument */ + andi.l #0x07,D6 /* least significant three bits */ + lsl.l #8,D6 /* move over to make mask */ + + andi.l #0x0000F8FF,D7 /* zero out current IPL */ + or.l D6,D7 /* place new IPL in sr */ + move.w D7,SR + + movem.l (SP),D6-D7 + lea 8(SP),SP + unlk A6 + rts + +/********************************************************************/ + .end + + + + +#if 0 + +/* + * File: mcf5xxx.s + * Purpose: Lowest level routines for all ColdFire processors. + * + * Notes: + * + */ + +#define mcf5xxx_exception_handler _mcf5xxx_exception_handler + + .extern mcf5xxx_exception_handler + + //.global asm_exception_handler + //.global _asm_exception_handler + .global asm_set_ipl + .global _asm_set_ipl + .global mcf5xxx_exe_wdebug + .global _mcf5xxx_exe_wdebug + //.global mcf5xxx_wr_cacr + //.global _mcf5xxx_wr_cacr + .global mcf5xxx_wr_asid + .global _mcf5xxx_wr_asid + .global mcf5xxx_wr_acr0 + .global _mcf5xxx_wr_acr0 + .global mcf5xxx_wr_acr1 + .global _mcf5xxx_wr_acr1 + .global mcf5xxx_wr_acr2 + .global _mcf5xxx_wr_acr2 + .global mcf5xxx_wr_acr3 + .global _mcf5xxx_wr_acr3 + .global mcf5xxx_wr_mmubar + .global _mcf5xxx_wr_mmubar + .global mcf5xxx_wr_other_a7 + .global _mcf5xxx_wr_other_a7 + // .global mcf5xxx_wr_vbr + // .global _mcf5xxx_wr_vbr + .global mcf5xxx_wr_macsr + .global _mcf5xxx_wr_macsr + .global mcf5xxx_wr_mask + .global _mcf5xxx_wr_mask + .global mcf5xxx_wr_acc0 + .global _mcf5xxx_wr_acc0 + .global mcf5xxx_wr_accext01 + .global _mcf5xxx_wr_accext01 + .global mcf5xxx_wr_accext23 + .global _mcf5xxx_wr_accext23 + .global mcf5xxx_wr_acc1 + .global _mcf5xxx_wr_acc1 + .global mcf5xxx_wr_acc2 + .global _mcf5xxx_wr_acc2 + .global mcf5xxx_wr_acc3 + .global _mcf5xxx_wr_acc3 + .global mcf5xxx_wr_sr + .global _mcf5xxx_wr_sr + .global mcf5xxx_wr_pc + .global _mcf5xxx_wr_pc + .global mcf5xxx_wr_rombar0 + .global _mcf5xxx_wr_rombar0 + .global mcf5xxx_wr_rombar1 + .global _mcf5xxx_wr_rombar1 + .global mcf5xxx_wr_rambar0 + .global _mcf5xxx_wr_rambar0 + .global mcf5xxx_wr_rambar1 + .global _mcf5xxx_wr_rambar1 + .global mcf5xxx_wr_mpcr + .global _mcf5xxx_wr_mpcr + .global mcf5xxx_wr_secmbar + .global _mcf5xxx_wr_secmbar + .global mcf5xxx_wr_mbar + .global _mcf5xxx_wr_mbar + + .text + +/******************************************************************** + * This routine is the lowest-level exception handler. + */ + /* +asm_exception_handler: +_asm_exception_handler: + lea -16(SP),SP + movem.l D0-D1/A0-A1,(SP) + lea 16(SP),A1 + move.l A1,-(SP) + jsr mcf5xxx_exception_handler + lea 4(SP),SP + movem.l (SP),D0-D1/A0-A1 + lea 16(SP),SP + rte + +/********************************************************************/ +/* + * This routines changes the IPL to the value passed into the routine. + * It also returns the old IPL value back. + * Calling convention from C: + * old_ipl = asm_set_ipl(new_ipl); + * For the Diab Data C compiler, it passes return value thru D0. + * Note that only the least significant three bits of the passed + * value are used. + */ + +asm_set_ipl: +_asm_set_ipl: + link A6,#-8 + movem.l D6-D7,(SP) + + move.w SR,D7 /* current sr */ + + move.l D7,D0 /* prepare return value */ + andi.l #0x0700,D0 /* mask out IPL */ + lsr.l #8,D0 /* IPL */ + + move.l 8(A6),D6 /* get argument */ + andi.l #0x07,D6 /* least significant three bits */ + lsl.l #8,D6 /* move over to make mask */ + + andi.l #0x0000F8FF,D7 /* zero out current IPL */ + or.l D6,D7 /* place new IPL in sr */ + move.w D7,SR + + movem.l (SP),D6-D7 + lea 8(SP),SP + unlk A6 + rts + +/********************************************************************/ +/* + * These routines execute special ColdFire instructions + */ + +mcf5xxx_exe_wdebug: +_mcf5xxx_exe_wdebug: + move.l 4(sp),a0 + wdebug.l (a0) + rts + +/********************************************************************/ +/* + * These routines write to the special purpose registers in the ColdFire + * core. Since these registers are write-only in the supervisor model, + * no corresponding read routines exist. + */ + +mcf5xxx_wr_sr: +_mcf5xxx_wr_sr: + move.l 4(SP),D0 + move.w D0,SR + rts +/* +mcf5xxx_wr_cacr: +_mcf5xxx_wr_cacr: + move.l 4(SP),D0 + .long 0x4e7b0002 /* movec d0,cacr */ +/* + nop + rts +*/ +mcf5xxx_wr_asid: +_mcf5xxx_wr_asid: + move.l 4(SP),D0 + .long 0x4e7b0003 /* movec d0,asid */ + nop + rts + +mcf5xxx_wr_acr0: +_mcf5xxx_wr_acr0: + move.l 4(SP),D0 + .long 0x4e7b0004 /* movec d0,ACR0 */ + nop + rts + +mcf5xxx_wr_acr1: +_mcf5xxx_wr_acr1: + move.l 4(SP),D0 + .long 0x4e7b0005 /* movec d0,ACR1 */ + nop + rts + +mcf5xxx_wr_acr2: +_mcf5xxx_wr_acr2: + move.l 4(SP),D0 + .long 0x4e7b0006 /* movec d0,ACR2 */ + nop + rts + +mcf5xxx_wr_acr3: +_mcf5xxx_wr_acr3: + move.l 4(SP),D0 + .long 0x4e7b0007 /* movec d0,ACR3 */ + nop + rts + +mcf5xxx_wr_mmubar: +_mcf5xxx_wr_mmubar: + move.l 4(SP),D0 + .long 0x4e7b0008 /* movec d0,MBAR */ + nop + rts + +mcf5xxx_wr_other_a7: +_mcf5xxx_wr_other_a7: + move.l 4(SP),D0 + .long 0x4e7b0800 /* movec d0,OTHER_A7 */ + nop + rts + +/* +mcf5xxx_wr_vbr: +_mcf5xxx_wr_vbr: + move.l 4(SP),D0 + .long 0x4e7b0801 /* movec d0,VBR */ + /* + nop + rts +*/ +mcf5xxx_wr_macsr: +_mcf5xxx_wr_macsr: + move.l 4(SP),D0 + .long 0x4e7b0804 /* movec d0,MACSR */ + nop + rts + +mcf5xxx_wr_mask: +_mcf5xxx_wr_mask: + move.l 4(SP),D0 + .long 0x4e7b0805 /* movec d0,MASK */ + nop + rts + +mcf5xxx_wr_acc0: +_mcf5xxx_wr_acc0: + move.l 4(SP),D0 + .long 0x4e7b0806 /* movec d0,ACC0 */ + nop + rts + +mcf5xxx_wr_accext01: +_mcf5xxx_wr_accext01: + move.l 4(SP),D0 + .long 0x4e7b0807 /* movec d0,ACCEXT01 */ + nop + rts + +mcf5xxx_wr_accext23: +_mcf5xxx_wr_accext23: + move.l 4(SP),D0 + .long 0x4e7b0808 /* movec d0,ACCEXT23 */ + nop + rts + +mcf5xxx_wr_acc1: +_mcf5xxx_wr_acc1: + move.l 4(SP),D0 + .long 0x4e7b0809 /* movec d0,ACC1 */ + nop + rts + +mcf5xxx_wr_acc2: +_mcf5xxx_wr_acc2: + move.l 4(SP),D0 + .long 0x4e7b080A /* movec d0,ACC2 */ + nop + rts + +mcf5xxx_wr_acc3: +_mcf5xxx_wr_acc3: + move.l 4(SP),D0 + .long 0x4e7b080B /* movec d0,ACC3 */ + nop + rts + +mcf5xxx_wr_pc: +_mcf5xxx_wr_pc: + move.l 4(SP),D0 + .long 0x4e7b080F /* movec d0,PC */ + nop + rts + +mcf5xxx_wr_rombar0: +_mcf5xxx_wr_rombar0: + move.l 4(SP),D0 + .long 0x4e7b0C00 /* movec d0,ROMBAR0 */ + nop + rts + +mcf5xxx_wr_rombar1: +_mcf5xxx_wr_rombar1: + move.l 4(SP),D0 + .long 0x4e7b0C01 /* movec d0,ROMBAR1 */ + nop + rts + +mcf5xxx_wr_rambar0: +_mcf5xxx_wr_rambar0: + move.l 4(SP),D0 + .long 0x4e7b0C04 /* movec d0,RAMBAR0 */ + nop + rts + +mcf5xxx_wr_rambar1: +_mcf5xxx_wr_rambar1: + move.l 4(SP),D0 + .long 0x4e7b0C05 /* movec d0,RAMBAR1 */ + nop + rts + +mcf5xxx_wr_mpcr: +_mcf5xxx_wr_mpcr: + move.l 4(SP),D0 + .long 0x4e7b0C0C /* movec d0,MPCR */ + nop + rts + +mcf5xxx_wr_secmbar: +_mcf5xxx_wr_secmbar: + move.l 4(SP),D0 + .long 0x4e7b0C0E /* movec d0,MBAR1 */ + nop + rts + +mcf5xxx_wr_mbar: +_mcf5xxx_wr_mbar: + move.l 4(SP),D0 + .long 0x4e7b0C0F /* movec d0,MBAR0 */ + nop + rts + +/********************************************************************/ + .end + +#endif diff --git a/Source/portable/GCC/ColdFire_V2/port.c b/Source/portable/GCC/ColdFire_V2/port.c new file mode 100644 index 00000000..17bc0ae2 --- /dev/null +++ b/Source/portable/GCC/ColdFire_V2/port.c @@ -0,0 +1,70 @@ +/* + FreeRTOS.org V5.0.3 - Copyright (C) 2003-2008 Richard Barry. + + This file is part of the FreeRTOS.org distribution. + + FreeRTOS.org is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + FreeRTOS.org is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with FreeRTOS.org; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes FreeRTOS.org, without being obliged to provide + the source code for any proprietary components. See the licensing section + of http://www.FreeRTOS.org for full details of how and when the exception + can be applied. + + *************************************************************************** + *************************************************************************** + * * + * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, * + * and even write all or part of your application on your behalf. * + * See http://www.OpenRTOS.com for details of the services we provide to * + * expedite your project. * + * * + *************************************************************************** + *************************************************************************** + + Please ensure to read the configuration and relevant port sections of the + online documentation. + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/* Kernel includes. */ + +#include "FreeRTOS.h" +#include "task.h" + + +portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) +{ + return NULL; +} +/*-----------------------------------------------------------*/ + +portBASE_TYPE xPortStartScheduler( void ) +{ +} +/*-----------------------------------------------------------*/ + +void vPortEndScheduler( void ) +{ +} +/*-----------------------------------------------------------*/ \ No newline at end of file diff --git a/Source/portable/GCC/ColdFire_V2/portmacro.h b/Source/portable/GCC/ColdFire_V2/portmacro.h new file mode 100644 index 00000000..f503d8a8 --- /dev/null +++ b/Source/portable/GCC/ColdFire_V2/portmacro.h @@ -0,0 +1,135 @@ +/* + FreeRTOS.org V5.0.3 - Copyright (C) 2003-2008 Richard Barry. + + This file is part of the FreeRTOS.org distribution. + + FreeRTOS.org is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + FreeRTOS.org is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with FreeRTOS.org; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes FreeRTOS.org, without being obliged to provide + the source code for any proprietary components. See the licensing section + of http://www.FreeRTOS.org for full details of how and when the exception + can be applied. + + *************************************************************************** + *************************************************************************** + * * + * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, * + * and even write all or part of your application on your behalf. * + * See http://www.OpenRTOS.com for details of the services we provide to * + * expedite your project. * + * * + *************************************************************************** + *************************************************************************** + + Please ensure to read the configuration and relevant port sections of the + online documentation. + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +/* System include files */ +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short +#define portSTACK_TYPE unsigned long +#define portBASE_TYPE long + +#if( configUSE_16_BIT_TICKS == 1 ) + typedef unsigned portSHORT portTickType; + #define portMAX_DELAY ( portTickType ) 0xffff +#else + typedef unsigned portLONG portTickType; + #define portMAX_DELAY ( portTickType ) 0xffffffff +#endif +/*-----------------------------------------------------------*/ + +/* Hardware specifics. */ +#define portBYTE_ALIGNMENT 4 +#define portSTACK_GROWTH -4 +#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) +/*-----------------------------------------------------------*/ + +#define portDISABLE_INTERRUPTS() +#define portENABLE_INTERRUPTS() + + +extern void vTaskEnterCritical( void ); +extern void vTaskExitCritical( void ); +#define portENTER_CRITICAL() vPortEnterCritical() +#define portEXIT_CRITICAL() vPortExitCritical() + +extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR(); +extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE ); +#define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister ) + +/*-----------------------------------------------------------*/ + +/* Task utilities. */ + +#define portYIELD() + + +#define portNOP() asm volatile ( "nop" ) + +/*-----------------------------------------------------------*/ + +/* Task function macros as described on the FreeRTOS.org WEB site. */ +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) __attribute__((noreturn)) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) +/*-----------------------------------------------------------*/ + +#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) \ + { \ + portYIELD(); \ + } + + +#ifdef __cplusplus +} +#endif + +#endif /* PORTMACRO_H */ + -- cgit v1.2.3