diff options
| author | Craig Topper <craig.topper@gmail.com> | 2012-05-07 05:36:19 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-05-07 05:36:19 +0000 |
| commit | 5f9cccc509fc0a51ace855af19e8405cee900efd (patch) | |
| tree | 4997835bc6d5842af54a7fdb0a97e50844dc3371 | |
| parent | e5076d484b2f530e2e2422fb06c268970b53b055 (diff) | |
| download | llvm-5f9cccc509fc0a51ace855af19e8405cee900efd.tar.gz llvm-5f9cccc509fc0a51ace855af19e8405cee900efd.tar.bz2 llvm-5f9cccc509fc0a51ace855af19e8405cee900efd.tar.xz | |
Add SSE4A MOVNTSS/MOVNTSD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156281 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | include/llvm/IntrinsicsX86.td | 10 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 14 | ||||
| -rw-r--r-- | test/CodeGen/X86/sse4a.ll | 19 |
3 files changed, 43 insertions, 0 deletions
diff --git a/include/llvm/IntrinsicsX86.td b/include/llvm/IntrinsicsX86.td index cb7b3eadc8..1abeb9e555 100644 --- a/include/llvm/IntrinsicsX86.td +++ b/include/llvm/IntrinsicsX86.td @@ -1005,6 +1005,16 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". } //===----------------------------------------------------------------------===// +// SSE4A + +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_sse4a_movnt_ss : GCCBuiltin<"__builtin_ia32_movntss">, + Intrinsic<[], [llvm_ptr_ty, llvm_v4f32_ty], []>; + def int_x86_sse4a_movnt_sd : GCCBuiltin<"__builtin_ia32_movntsd">, + Intrinsic<[], [llvm_ptr_ty, llvm_v2f64_ty], []>; +} + +//===----------------------------------------------------------------------===// // AVX // Arithmetic ops diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index aa3e08bd4d..0a94055245 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -7271,6 +7271,20 @@ defm : pclmul_alias<"lqhq", 0x10>; defm : pclmul_alias<"lqlq", 0x00>; //===----------------------------------------------------------------------===// +// SSE4A Instructions +//===----------------------------------------------------------------------===// + +let Predicates = [HasSSE4A] in { +def MOVNTSS : I<0x2B, MRMDestMem, (outs), (ins f32mem:$dst, VR128:$src), + "movntss\t{$src, $dst|$dst, $src}", + [(int_x86_sse4a_movnt_ss addr:$dst, VR128:$src)]>, XS; + +def MOVNTSD : I<0x2B, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), + "movntsd\t{$src, $dst|$dst, $src}", + [(int_x86_sse4a_movnt_sd addr:$dst, VR128:$src)]>, XD; +} + +//===----------------------------------------------------------------------===// // AVX Instructions //===----------------------------------------------------------------------===// diff --git a/test/CodeGen/X86/sse4a.ll b/test/CodeGen/X86/sse4a.ll new file mode 100644 index 0000000000..0732353fce --- /dev/null +++ b/test/CodeGen/X86/sse4a.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse4a | FileCheck %s + +define void @test1(float* %p, <4 x float> %a) nounwind optsize ssp { +; CHECK: movntss +entry: + tail call void @llvm.x86.sse4a.movnt.ss(float* %p, <4 x float> %a) nounwind + ret void +} + +declare void @llvm.x86.sse4a.movnt.ss(float*, <4 x float>) + +define void @test2(double* %p, <2 x double> %a) nounwind optsize ssp { +; CHECK: movntsd +entry: + tail call void @llvm.x86.sse4a.movnt.sd(double* %p, <2 x double> %a) nounwind + ret void +} + +declare void @llvm.x86.sse4a.movnt.sd(double*, <2 x double>) |