[SystemZ] Revert r191661: Add definitions of LFH and STFH

For some reason, adding definitions for these load and store
instructions changed whether some of the build bots matched
comparisons as signed or unsigned.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191663 91177308-0d34-0410-b5e6-96231b3b80d8

5 files changed, 0 insertions, 134 deletions

diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index b93e863a95..4cd087540d 100644
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -294,8 +294,6 @@ let neverHasSideEffects = 1, isAsCheapAsAMove = 1, isMoveImm = 1,
 // Register loads.
 let canFoldAsLoad = 1, SimpleBDXLoad = 1 in {
   defm L : UnaryRXPair<"l", 0x58, 0xE358, load, GR32, 4>;
-  def LFH : UnaryRXY<"lfh", 0xE3CA, load, GRH32, 4>,
-            Requires<[FeatureHighWord]>;
   def LG : UnaryRXY<"lg", 0xE304, load, GR64, 8>;
 
   // These instructions are split after register allocation, so we don't
@@ -328,8 +326,6 @@ let Uses = [CC] in {
 // Register stores.
 let SimpleBDXStore = 1 in {
   defm ST : StoreRXPair<"st", 0x50, 0xE350, store, GR32, 4>;
-  def STFH : StoreRXY<"stfh", 0xE3CB, store, GRH32, 4>,
-             Requires<[FeatureHighWord]>;
   def STG : StoreRXY<"stg", 0xE324, store, GR64, 8>;
 
   // These instructions are split after register allocation, so we don't
diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt
index afd09b52df..4ac6031966 100644
--- a/test/MC/Disassembler/SystemZ/insns.txt
+++ b/test/MC/Disassembler/SystemZ/insns.txt
@@ -2749,36 +2749,6 @@
 # CHECK: ley %f15, 0
 0xed 0xf0 0x00 0x00 0x00 0x64
 
-# CHECK: lfh %r0, -524288
-0xe3 0x00 0x00 0x00 0x80 0xca
-
-# CHECK: lfh %r0, -1
-0xe3 0x00 0x0f 0xff 0xff 0xca
-
-# CHECK: lfh %r0, 0
-0xe3 0x00 0x00 0x00 0x00 0xca
-
-# CHECK: lfh %r0, 1
-0xe3 0x00 0x00 0x01 0x00 0xca
-
-# CHECK: lfh %r0, 524287
-0xe3 0x00 0x0f 0xff 0x7f 0xca
-
-# CHECK: lfh %r0, 0(%r1)
-0xe3 0x00 0x10 0x00 0x00 0xca
-
-# CHECK: lfh %r0, 0(%r15)
-0xe3 0x00 0xf0 0x00 0x00 0xca
-
-# CHECK: lfh %r0, 524287(%r1,%r15)
-0xe3 0x01 0xff 0xff 0x7f 0xca
-
-# CHECK: lfh %r0, 524287(%r15,%r1)
-0xe3 0x0f 0x1f 0xff 0x7f 0xca
-
-# CHECK: lfh %r15, 0
-0xe3 0xf0 0x00 0x00 0x00 0xca
-
 # CHECK: lgbr %r0, %r15
 0xb9 0x06 0x00 0x0f
 
@@ -6727,36 +6697,6 @@
 # CHECK: sth %r15, 0
 0x40 0xf0 0x00 0x00
 
-# CHECK: stfh %r0, -524288
-0xe3 0x00 0x00 0x00 0x80 0xcb
-
-# CHECK: stfh %r0, -1
-0xe3 0x00 0x0f 0xff 0xff 0xcb
-
-# CHECK: stfh %r0, 0
-0xe3 0x00 0x00 0x00 0x00 0xcb
-
-# CHECK: stfh %r0, 1
-0xe3 0x00 0x00 0x01 0x00 0xcb
-
-# CHECK: stfh %r0, 524287
-0xe3 0x00 0x0f 0xff 0x7f 0xcb
-
-# CHECK: stfh %r0, 0(%r1)
-0xe3 0x00 0x10 0x00 0x00 0xcb
-
-# CHECK: stfh %r0, 0(%r15)
-0xe3 0x00 0xf0 0x00 0x00 0xcb
-
-# CHECK: stfh %r0, 524287(%r1,%r15)
-0xe3 0x01 0xff 0xff 0x7f 0xcb
-
-# CHECK: stfh %r0, 524287(%r15,%r1)
-0xe3 0x0f 0x1f 0xff 0x7f 0xcb
-
-# CHECK: stfh %r15, 0
-0xe3 0xf0 0x00 0x00 0x00 0xcb
-
 # CHECK: sthy %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x70
 
diff --git a/test/MC/SystemZ/insn-bad-z196.s b/test/MC/SystemZ/insn-bad-z196.s
index cc795d4f17..477dac2d26 100644
--- a/test/MC/SystemZ/insn-bad-z196.s
+++ b/test/MC/SystemZ/insn-bad-z196.s
@@ -73,14 +73,6 @@
 	fixbra	%f2, 0, %f0, 0
 
 #CHECK: error: invalid operand
-#CHECK: lfh	%r0, -524289
-#CHECK: error: invalid operand
-#CHECK: lfh	%r0, 524288
-
-	lfh	%r0, -524289
-	lfh	%r0, 524288
-
-#CHECK: error: invalid operand
 #CHECK: loc	%r0,0,-1
 #CHECK: error: invalid operand
 #CHECK: loc	%r0,0,16
@@ -213,14 +205,6 @@
 	srlk	%r0,%r0,0(%r1,%r2)
 
 #CHECK: error: invalid operand
-#CHECK: stfh	%r0, -524289
-#CHECK: error: invalid operand
-#CHECK: stfh	%r0, 524288
-
-	stfh	%r0, -524289
-	stfh	%r0, 524288
-
-#CHECK: error: invalid operand
 #CHECK: stoc	%r0,0,-1
 #CHECK: error: invalid operand
 #CHECK: stoc	%r0,0,16
diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s
index 2420e40679..f7baeef98b 100644
--- a/test/MC/SystemZ/insn-bad.s
+++ b/test/MC/SystemZ/insn-bad.s
@@ -1454,11 +1454,6 @@
 	ley	%f0, -524289
 	ley	%f0, 524288
 
-#CHECK: error: {{(instruction requires: high-word)?}}
-#CHECK: lfh	%r0, 0
-
-	lfh	%r0, 0
-
 #CHECK: error: invalid operand
 #CHECK: lg	%r0, -524289
 #CHECK: error: invalid operand
@@ -2987,11 +2982,6 @@
 	sthy	%r0, -524289
 	sthy	%r0, 524288
 
-#CHECK: error: {{(instruction requires: high-word)?}}
-#CHECK: stfh	%r0, 0
-
-	stfh	%r0, 0
-
 #CHECK: error: invalid operand
 #CHECK: stmg	%r0, %r0, -524289
 #CHECK: error: invalid operand
diff --git a/test/MC/SystemZ/insn-good-z196.s b/test/MC/SystemZ/insn-good-z196.s
index 66ce63aa48..4b12265f73 100644
--- a/test/MC/SystemZ/insn-good-z196.s
+++ b/test/MC/SystemZ/insn-good-z196.s
@@ -163,28 +163,6 @@
 	fixbra	%f4, 5, %f8, 9
 	fixbra	%f13, 0, %f0, 0
 
-#CHECK: lfh	%r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0xca]
-#CHECK: lfh	%r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0xca]
-#CHECK: lfh	%r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0xca]
-#CHECK: lfh	%r0, 1                  # encoding: [0xe3,0x00,0x00,0x01,0x00,0xca]
-#CHECK: lfh	%r0, 524287             # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0xca]
-#CHECK: lfh	%r0, 0(%r1)             # encoding: [0xe3,0x00,0x10,0x00,0x00,0xca]
-#CHECK: lfh	%r0, 0(%r15)            # encoding: [0xe3,0x00,0xf0,0x00,0x00,0xca]
-#CHECK: lfh	%r0, 524287(%r1,%r15)   # encoding: [0xe3,0x01,0xff,0xff,0x7f,0xca]
-#CHECK: lfh	%r0, 524287(%r15,%r1)   # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0xca]
-#CHECK: lfh	%r15, 0                 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0xca]
-
-	lfh	%r0, -524288
-	lfh	%r0, -1
-	lfh	%r0, 0
-	lfh	%r0, 1
-	lfh	%r0, 524287
-	lfh	%r0, 0(%r1)
-	lfh	%r0, 0(%r15)
-	lfh	%r0, 524287(%r1,%r15)
-	lfh	%r0, 524287(%r15,%r1)
-	lfh	%r15, 0
-
 #CHECK: loc	%r0, 0, 0               # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf2]
 #CHECK: loc	%r0, 0, 15              # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf2]
 #CHECK: loc	%r0, -524288, 0         # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf2]
@@ -559,28 +537,6 @@
 	srlk	%r0,%r0,524287(%r1)
 	srlk	%r0,%r0,524287(%r15)
 
-#CHECK: stfh	%r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0xcb]
-#CHECK: stfh	%r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0xcb]
-#CHECK: stfh	%r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0xcb]
-#CHECK: stfh	%r0, 1                  # encoding: [0xe3,0x00,0x00,0x01,0x00,0xcb]
-#CHECK: stfh	%r0, 524287             # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0xcb]
-#CHECK: stfh	%r0, 0(%r1)             # encoding: [0xe3,0x00,0x10,0x00,0x00,0xcb]
-#CHECK: stfh	%r0, 0(%r15)            # encoding: [0xe3,0x00,0xf0,0x00,0x00,0xcb]
-#CHECK: stfh	%r0, 524287(%r1,%r15)   # encoding: [0xe3,0x01,0xff,0xff,0x7f,0xcb]
-#CHECK: stfh	%r0, 524287(%r15,%r1)   # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0xcb]
-#CHECK: stfh	%r15, 0                 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0xcb]
-
-	stfh	%r0, -524288
-	stfh	%r0, -1
-	stfh	%r0, 0
-	stfh	%r0, 1
-	stfh	%r0, 524287
-	stfh	%r0, 0(%r1)
-	stfh	%r0, 0(%r15)
-	stfh	%r0, 524287(%r1,%r15)
-	stfh	%r0, 524287(%r15,%r1)
-	stfh	%r15, 0
-
 #CHECK: stoc	%r0, 0, 0               # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf3]
 #CHECK: stoc	%r0, 0, 15              # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf3]
 #CHECK: stoc	%r0, -524288, 0         # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf3]