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| author | Eli Friedman <eli.friedman@gmail.com> | 2012-11-17 01:52:46 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2012-11-17 01:52:46 +0000 |
| commit | 43147afd71f6da4e7369a4ab9c681e5b4e0cf8c7 (patch) | |
| tree | 3ea1f611a8ddf157d94266187caaba4eb6463f49 | |
| parent | 0a63b6ac79a9234982ce5d0bdc9aabd0c5e01245 (diff) | |
| download | llvm-43147afd71f6da4e7369a4ab9c681e5b4e0cf8c7.tar.gz llvm-43147afd71f6da4e7369a4ab9c681e5b4e0cf8c7.tar.bz2 llvm-43147afd71f6da4e7369a4ab9c681e5b4e0cf8c7.tar.xz | |
Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by Pete Couperus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168240 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 1 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 1 | ||||
| -rw-r--r-- | test/CodeGen/ARM/neon_fpconv.ll | 8 |
3 files changed, 10 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp index 3250133a67..d63862d638 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -222,6 +222,7 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) { case ISD::FNEARBYINT: case ISD::FFLOOR: case ISD::FP_ROUND: + case ISD::FP_EXTEND: case ISD::FMA: case ISD::SIGN_EXTEND_INREG: QueryType = Node->getValueType(0); diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index e123f1563e..bd470eb4bb 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -544,6 +544,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) setOperationAction(ISD::FP_TO_SINT, MVT::v4i16, Custom); setOperationAction(ISD::FP_ROUND, MVT::v2f32, Expand); + setOperationAction(ISD::FP_EXTEND, MVT::v2f64, Expand); setTargetDAGCombine(ISD::INTRINSIC_VOID); setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); diff --git a/test/CodeGen/ARM/neon_fpconv.ll b/test/CodeGen/ARM/neon_fpconv.ll index f80ea3e349..1948ad8471 100644 --- a/test/CodeGen/ARM/neon_fpconv.ll +++ b/test/CodeGen/ARM/neon_fpconv.ll @@ -7,3 +7,11 @@ define <2 x float> @vtrunc(<2 x double> %a) { %vt = fptrunc <2 x double> %a to <2 x float> ret <2 x float> %vt } + +define <2 x double> @vextend(<2 x float> %a) { +; CHECK: vcvt.f64.f32 [[D0:d[0-9]+]], [[S0:s[0-9]+]] +; CHECK: vcvt.f64.f32 [[D1:d[0-9]+]], [[S1:s[0-9]+]] + %ve = fpext <2 x float> %a to <2 x double> + ret <2 x double> %ve +} + |