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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-12-20 22:54:05 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-12-20 22:54:05 +0000 |
commit | 56706db45bbc7be0c087451ca9f1d258324df4b2 (patch) | |
tree | 9d3f00f5794af62b0a2abd3af64b29f07771e19b | |
parent | be06aacaa9a270384599bbfa850b967e9996b9fb (diff) | |
download | llvm-56706db45bbc7be0c087451ca9f1d258324df4b2.tar.gz llvm-56706db45bbc7be0c087451ca9f1d258324df4b2.tar.bz2 llvm-56706db45bbc7be0c087451ca9f1d258324df4b2.tar.xz |
Require the two-argument MI::addOperand(MF, MO) for dangling instructions.
Instructions that are inserted in a basic block can still be decorated
with addOperand(MO).
Make the two-argument addOperand() function contain the actual
implementation. This function will now always have a valid MF reference
that it can use for memory allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170798 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/CodeGen/MachineInstr.h | 27 | ||||
-rw-r--r-- | lib/CodeGen/MachineInstr.cpp | 10 |
2 files changed, 25 insertions, 12 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index c34711cb33..de553a776e 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -940,19 +940,24 @@ public: //===--------------------------------------------------------------------===// // Accessors used to build up machine instructions. - /// addOperand - Add the specified operand to the instruction. If it is an - /// implicit operand, it is added to the end of the operand list. If it is - /// an explicit operand it is added at the end of the explicit operand list + /// Add the specified operand to the instruction. If it is an implicit + /// operand, it is added to the end of the operand list. If it is an + /// explicit operand it is added at the end of the explicit operand list /// (before the first implicit operand). - void addOperand(const MachineOperand &Op); + /// + /// MF must be the machine function that was used to allocate this + /// instruction. + /// + /// MachineInstrBuilder provides a more convenient interface for creating + /// instructions and adding operands. + void addOperand(MachineFunction &MF, const MachineOperand &Op); - // Add an operand while providing a context pointer. This will replace the - // single-argument function shortly. - // - // MF must be the machine function that was used to allocate this instruction. - void addOperand(MachineFunction &MF, const MachineOperand &Op) { - addOperand(Op); - } + /// Add an operand without providing an MF reference. This only works for + /// instructions that are inserted in a basic block. + /// + /// MachineInstrBuilder and the two-argument addOperand(MF, MO) should be + /// preferred. + void addOperand(const MachineOperand &Op); /// setDesc - Replace the instruction descriptor (thus opcode) of /// the current instruction with a new one. diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index a98949025a..675df1933f 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -603,11 +603,19 @@ void MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &MRI) { MRI.addRegOperandToUseList(&Operands[i]); } +void MachineInstr::addOperand(const MachineOperand &Op) { + MachineBasicBlock *MBB = getParent(); + assert(MBB && "Use MachineInstrBuilder to add operands to dangling instrs"); + MachineFunction *MF = MBB->getParent(); + assert(MF && "Use MachineInstrBuilder to add operands to dangling instrs"); + addOperand(*MF, Op); +} + /// addOperand - Add the specified operand to the instruction. If it is an /// implicit operand, it is added to the end of the operand list. If it is /// an explicit operand it is added at the end of the explicit operand list /// (before the first implicit operand). -void MachineInstr::addOperand(const MachineOperand &Op) { +void MachineInstr::addOperand(MachineFunction &MF, const MachineOperand &Op) { assert(MCID && "Cannot add operands before providing an instr descriptor"); bool isImpReg = Op.isReg() && Op.isImplicit(); MachineRegisterInfo *RegInfo = getRegInfo(); |