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| author | Evan Cheng <evan.cheng@apple.com> | 2008-03-18 23:36:35 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-03-18 23:36:35 +0000 |
| commit | 586ccac4ec4d023864e720dc36373809b9b88b09 (patch) | |
| tree | 682f446f9c79f5777e22a726ca0340583b1812d0 | |
| parent | 050bc81936026b292e9e0c4256830062a59045c7 (diff) | |
| download | llvm-586ccac4ec4d023864e720dc36373809b9b88b09.tar.gz llvm-586ccac4ec4d023864e720dc36373809b9b88b09.tar.bz2 llvm-586ccac4ec4d023864e720dc36373809b9b88b09.tar.xz | |
Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48515 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 16 | ||||
| -rw-r--r-- | test/CodeGen/X86/x86-64-varargs.ll | 11 |
2 files changed, 21 insertions, 6 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 8655eff488..5a05abac89 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1746,18 +1746,22 @@ SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) { if (IsTailCall) Ops.push_back(DAG.getConstant(FPDiff, MVT::i32)); - // Add an implicit use GOT pointer in EBX. - if (!IsTailCall && !Is64Bit && - getTargetMachine().getRelocationModel() == Reloc::PIC_ && - Subtarget->isPICStyleGOT()) - Ops.push_back(DAG.getRegister(X86::EBX, getPointerTy())); - // Add argument registers to the end of the list so that they are known live // into the call. for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) Ops.push_back(DAG.getRegister(RegsToPass[i].first, RegsToPass[i].second.getValueType())); + // Add an implicit use GOT pointer in EBX. + if (!IsTailCall && !Is64Bit && + getTargetMachine().getRelocationModel() == Reloc::PIC_ && + Subtarget->isPICStyleGOT()) + Ops.push_back(DAG.getRegister(X86::EBX, getPointerTy())); + + // Add an implicit use of AL for x86 vararg functions. + if (Is64Bit && isVarArg) + Ops.push_back(DAG.getRegister(X86::AL, MVT::i8)); + if (InFlag.Val) Ops.push_back(InFlag); diff --git a/test/CodeGen/X86/x86-64-varargs.ll b/test/CodeGen/X86/x86-64-varargs.ll new file mode 100644 index 0000000000..2964dd3969 --- /dev/null +++ b/test/CodeGen/X86/x86-64-varargs.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -code-model=large -relocation-model=static | grep call | not grep rax + +@.str = internal constant [26 x i8] c"%d, %f, %d, %lld, %d, %f\0A\00" ; <[26 x i8]*> [#uses=1] + +declare i32 @printf(i8*, ...) nounwind + +define i32 @main() nounwind { +entry: + %tmp10.i = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([26 x i8]* @.str, i32 0, i64 0), i32 12, double 0x3FF3EB8520000000, i32 120, i64 123456677890, i32 -10, double 4.500000e+15 ) nounwind ; <i32> [#uses=0] + ret i32 0 +} |