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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-03-24 18:21:38 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-03-24 18:21:38 +0000 |
| commit | 5f71aeed1a8f37298c5a2179e1ef1b61ca7226a5 (patch) | |
| tree | 73183bc2cf47d6e07cee0692123b8e3383c40ac1 | |
| parent | 705b92b04d0dd88320c14894a3105a2ce5df026f (diff) | |
| download | llvm-5f71aeed1a8f37298c5a2179e1ef1b61ca7226a5.tar.gz llvm-5f71aeed1a8f37298c5a2179e1ef1b61ca7226a5.tar.bz2 llvm-5f71aeed1a8f37298c5a2179e1ef1b61ca7226a5.tar.xz | |
Merging r200830:
------------------------------------------------------------------------
r200830 | michel.daenzer | 2014-02-05 01:48:05 -0800 (Wed, 05 Feb 2014) | 8 lines
R600/SI: Add pattern for zero-extending i1 to i32
Fixes opencl-example if_* tests with radeonsi.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74469
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@204646 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/R600/SIInstructions.td | 5 | ||||
| -rw-r--r-- | test/CodeGen/R600/zero_extend.ll | 10 |
2 files changed, 15 insertions, 0 deletions
diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index ae641164b4..37a77ce71b 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -1818,6 +1818,11 @@ def : Pat < (V_CNDMASK_B32_e64 (i32 0), (i32 -1), $src0) >; +def : Pat < + (i32 (zext i1:$src0)), + (V_CNDMASK_B32_e64 (i32 0), (i32 1), $src0) +>; + // 1. Offset as 8bit DWORD immediate def : Pat < (SIload_constant i128:$sbase, IMM8bitDWORD:$offset), diff --git a/test/CodeGen/R600/zero_extend.ll b/test/CodeGen/R600/zero_extend.ll index 481b3b3282..a114bfc4a0 100644 --- a/test/CodeGen/R600/zero_extend.ll +++ b/test/CodeGen/R600/zero_extend.ll @@ -16,3 +16,13 @@ entry: store i64 %2, i64 addrspace(1)* %out ret void } + +; SI-CHECK-LABEL: @testi1toi32 +; SI-CHECK: V_CNDMASK_B32 +define void @testi1toi32(i32 addrspace(1)* %out, i32 %a, i32 %b) { +entry: + %0 = icmp eq i32 %a, %b + %1 = zext i1 %0 to i32 + store i32 %1, i32 addrspace(1)* %out + ret void +} |