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| author | Bill Wendling <isanbard@gmail.com> | 2011-10-13 07:42:32 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2011-10-13 07:42:32 +0000 |
| commit | 82222c20be24adda7c218f3fdaf2e0ae049c955b (patch) | |
| tree | 21053ccf90f050fea78f5a089a68a40abe040b98 | |
| parent | 326e491ce7f7ad61014339c36a8cd90b33af98b9 (diff) | |
| download | llvm-82222c20be24adda7c218f3fdaf2e0ae049c955b.tar.gz llvm-82222c20be24adda7c218f3fdaf2e0ae049c955b.tar.bz2 llvm-82222c20be24adda7c218f3fdaf2e0ae049c955b.tar.xz | |
Should not add instructions to a BB after a return instruction. The machine instruction verifier doesn't like this, nor do I.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141856 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86FrameLowering.cpp | 3 | ||||
| -rw-r--r-- | test/CodeGen/X86/segmented-stacks.ll | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/X86/X86FrameLowering.cpp b/lib/Target/X86/X86FrameLowering.cpp index 23b071673d..757cef2d7f 100644 --- a/lib/Target/X86/X86FrameLowering.cpp +++ b/lib/Target/X86/X86FrameLowering.cpp @@ -1414,11 +1414,12 @@ X86FrameLowering::adjustForSegmentedStacks(MachineFunction &MF) const { if (!Is64Bit) BuildMI(allocMBB, DL, TII.get(X86::ADD32ri), X86::ESP).addReg(X86::ESP) .addImm(8); - BuildMI(allocMBB, DL, TII.get(X86::RET)); if (Is64Bit && IsNested) BuildMI(allocMBB, DL, TII.get(X86::MOV64rr), X86::R10).addReg(X86::RAX); + BuildMI(allocMBB, DL, TII.get(X86::RET)); + allocMBB->addSuccessor(&prologueMBB); checkMBB->addSuccessor(allocMBB); checkMBB->addSuccessor(&prologueMBB); diff --git a/test/CodeGen/X86/segmented-stacks.ll b/test/CodeGen/X86/segmented-stacks.ll index 3f0067e292..37f082c730 100644 --- a/test/CodeGen/X86/segmented-stacks.ll +++ b/test/CodeGen/X86/segmented-stacks.ll @@ -81,7 +81,7 @@ define i32 @test_nested(i32 * nest %closure, i32 %other) { ; X64-NEXT: movabsq $0, %r10 ; X64-NEXT: movabsq $0, %r11 ; X64-NEXT: callq __morestack -; X64-NEXT: ret ; X64-NEXT: movq %rax, %r10 +; X64-NEXT: ret } |