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| author | Kalle Raiskila <kalle.raiskila@nokia.com> | 2012-04-29 20:00:55 +0000 |
|---|---|---|
| committer | Kalle Raiskila <kalle.raiskila@nokia.com> | 2012-04-29 20:00:55 +0000 |
| commit | a04fe83378d51d17059db48eac40ca274eba3760 (patch) | |
| tree | 61ba688cbe4a1a96bad61e06ebf83a644a149bf5 | |
| parent | 2b8d0501b169c3ee81a9af1cb715e1be4d6a079e (diff) | |
| download | llvm-a04fe83378d51d17059db48eac40ca274eba3760.tar.gz llvm-a04fe83378d51d17059db48eac40ca274eba3760.tar.bz2 llvm-a04fe83378d51d17059db48eac40ca274eba3760.tar.xz | |
Update the documentation of CellSPU, in case it gets removed in 3.1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155797 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | CREDITS.TXT | 4 | ||||
| -rw-r--r-- | lib/Target/CellSPU/README.txt | 14 |
2 files changed, 18 insertions, 0 deletions
diff --git a/CREDITS.TXT b/CREDITS.TXT index bf32a4c565..6b10a0de07 100644 --- a/CREDITS.TXT +++ b/CREDITS.TXT @@ -342,6 +342,10 @@ W: http://vladimir_prus.blogspot.com E: ghost@cs.msu.su D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass +N: Kalle Raiskila +E: kalle.rasikila@nokia.com +D: Some bugfixes to CellSPU + N: Xerxes Ranby E: xerxes@zafena.se D: Cmake dependency chain and various bug fixes diff --git a/lib/Target/CellSPU/README.txt b/lib/Target/CellSPU/README.txt index 3e7e0b68e8..3bce9609bf 100644 --- a/lib/Target/CellSPU/README.txt +++ b/lib/Target/CellSPU/README.txt @@ -37,6 +37,20 @@ to add 'spu' to configure's --enable-targets option, e.g.: --------------------------------------------------------------------------- TODO: +* In commit r142152 vector legalization was set to element promotion per + default. This breaks half vectors (e.g. v2i32) badly as they get element + promoted to much slower types (v2i64). + +* Many CellSPU specific codegen tests only grep & count the number of + instructions, not checking their place with FileCheck. There have also + been some commits that change the CellSPU checks, some of which might + have not been thoroughly scrutinized w.r.t. to the changes they cause in SPU + assembly. (especially since about the time of r142152) + +* Some of the i64 math have huge tablegen rules, which sometime cause + tablegen to run out of memory. See e.g. bug 8850. i64 arithmetics + should probably be done with libraries. + * Create a machine pass for performing dual-pipeline scheduling specifically for CellSPU, and insert branch prediction instructions as needed. |