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author | Dan Gohman <gohman@apple.com> | 2008-04-15 23:55:07 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-04-15 23:55:07 +0000 |
commit | a630f4ed916cf8d426ee5f798be35135c055a441 (patch) | |
tree | bd3a3745e43d952156fd1b39f7f0032b276e1b90 | |
parent | d6bb296d4fd302f3bbdb1806615c1fe3773b8bb5 (diff) | |
download | llvm-a630f4ed916cf8d426ee5f798be35135c055a441.tar.gz llvm-a630f4ed916cf8d426ee5f798be35135c055a441.tar.bz2 llvm-a630f4ed916cf8d426ee5f798be35135c055a441.tar.xz |
Add movd instructions to move from MMX registers
to 64-bit GPR registers on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49757 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86InstrMMX.td | 12 | ||||
-rw-r--r-- | test/CodeGen/X86/mmx-bitcast-to-i64.ll | 26 |
2 files changed, 38 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td index 407f8a6f19..be07fa7ae5 100644 --- a/lib/Target/X86/X86InstrMMX.td +++ b/lib/Target/X86/X86InstrMMX.td @@ -167,6 +167,10 @@ def MMX_MOVD64to64rr : MMXRI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src), "movd\t{$src, $dst|$dst, $src}", []>; let neverHasSideEffects = 1 in +def MMX_MOVD64from64rr : MMXRI<0x6E, MRMSrcReg, (outs GR64:$dst), (ins VR64:$src), + "movd\t{$src, $dst|$dst, $src}", []>; + +let neverHasSideEffects = 1 in def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src), "movq\t{$src, $dst|$dst, $src}", []>; let isSimpleLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in @@ -548,6 +552,14 @@ def : Pat<(v4i16 (bitconvert (i64 GR64:$src))), (MMX_MOVD64to64rr GR64:$src)>; def : Pat<(v8i8 (bitconvert (i64 GR64:$src))), (MMX_MOVD64to64rr GR64:$src)>; +def : Pat<(i64 (bitconvert (v1i64 VR64:$src))), + (MMX_MOVD64from64rr VR64:$src)>; +def : Pat<(i64 (bitconvert (v2i32 VR64:$src))), + (MMX_MOVD64from64rr VR64:$src)>; +def : Pat<(i64 (bitconvert (v4i16 VR64:$src))), + (MMX_MOVD64from64rr VR64:$src)>; +def : Pat<(i64 (bitconvert (v8i8 VR64:$src))), + (MMX_MOVD64from64rr VR64:$src)>; // Move scalar to XMM zero-extended // movd to XMM register zero-extends diff --git a/test/CodeGen/X86/mmx-bitcast-to-i64.ll b/test/CodeGen/X86/mmx-bitcast-to-i64.ll new file mode 100644 index 0000000000..c6bb48927b --- /dev/null +++ b/test/CodeGen/X86/mmx-bitcast-to-i64.ll @@ -0,0 +1,26 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 4 + +define i64 @foo(<1 x i64>* %p) { + %t = load <1 x i64>* %p + %u = add <1 x i64> %t, %t + %s = bitcast <1 x i64> %u to i64 + ret i64 %s +} +define i64 @goo(<2 x i32>* %p) { + %t = load <2 x i32>* %p + %u = add <2 x i32> %t, %t + %s = bitcast <2 x i32> %u to i64 + ret i64 %s +} +define i64 @hoo(<4 x i16>* %p) { + %t = load <4 x i16>* %p + %u = add <4 x i16> %t, %t + %s = bitcast <4 x i16> %u to i64 + ret i64 %s +} +define i64 @ioo(<8 x i8>* %p) { + %t = load <8 x i8>* %p + %u = add <8 x i8> %t, %t + %s = bitcast <8 x i8> %u to i64 + ret i64 %s +} |