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| author | Chris Lattner <sabre@nondot.org> | 2007-11-16 06:04:17 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2007-11-16 06:04:17 +0000 |
| commit | a7d1ab0ab317af563a410a8abdc528bb58892d1c (patch) | |
| tree | 331732fdc91d9db4500aa193c2cc4058cea15e09 | |
| parent | b7632286951f7f7977ebb0ff00a9c7e5dd746153 (diff) | |
| download | llvm-a7d1ab0ab317af563a410a8abdc528bb58892d1c.tar.gz llvm-a7d1ab0ab317af563a410a8abdc528bb58892d1c.tar.bz2 llvm-a7d1ab0ab317af563a410a8abdc528bb58892d1c.tar.xz | |
Fix PR1800 by correcting mistaken logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44188 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Transforms/Scalar/InstructionCombining.cpp | 3 | ||||
| -rw-r--r-- | test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll | 10 |
2 files changed, 11 insertions, 2 deletions
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp index efcd8e3297..e8cd86778a 100644 --- a/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/lib/Transforms/Scalar/InstructionCombining.cpp @@ -3577,8 +3577,7 @@ Instruction *InstCombiner::visitAnd(BinaryOperator &I) { case ICmpInst::ICMP_SGT: switch (RHSCC) { default: assert(0 && "Unknown integer condition code!"); - case ICmpInst::ICMP_EQ: // (X s> 13 & X == 15) -> X s> 13 - return ReplaceInstUsesWith(I, LHS); + case ICmpInst::ICMP_EQ: // (X s> 13 & X == 15) -> X == 15 case ICmpInst::ICMP_SGT: // (X s> 13 & X s> 15) -> X s> 15 return ReplaceInstUsesWith(I, RHS); case ICmpInst::ICMP_UGT: // (X s> 13 & X u> 15) -> no change diff --git a/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll b/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll new file mode 100644 index 0000000000..d7ac211372 --- /dev/null +++ b/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {icmp eq i32 %In, 1} +; PR1800 + +define i1 @test(i32 %In) { + %c1 = icmp sgt i32 %In, -1 + %c2 = icmp eq i32 %In, 1 + %V = and i1 %c1, %c2 + ret i1 %V +} + |