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authorChris Lattner <sabre@nondot.org>2008-11-26 22:16:44 +0000
committerChris Lattner <sabre@nondot.org>2008-11-26 22:16:44 +0000
commitab8b794a789390ca2f1ad5372d4813911e306663 (patch)
treeda121d9683eb95a21739c6ba50b428782345147d
parentbaa39d866410d1f1d7ef6795f82c968bd94ea4a0 (diff)
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Turn on my codegen prepare heuristic by default. It doesn't affect
performance in most cases on the Grawp tester, but does speed some things up (like shootout/hash by 15%). This also doesn't impact compile time in a noticable way on the Grawp tester. It also, of course, gets the testcase it was designed for right :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60120 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Transforms/Scalar/CodeGenPrepare.cpp6
-rw-r--r--test/CodeGen/X86/isel-sink3.ll4
2 files changed, 3 insertions, 7 deletions
diff --git a/lib/Transforms/Scalar/CodeGenPrepare.cpp b/lib/Transforms/Scalar/CodeGenPrepare.cpp
index 367ea1b056..93252c8b3b 100644
--- a/lib/Transforms/Scalar/CodeGenPrepare.cpp
+++ b/lib/Transforms/Scalar/CodeGenPrepare.cpp
@@ -1025,10 +1025,6 @@ bool AddressingModeMatcher::ValueAlreadyLiveAtInst(Value *Val,Value *KnownLive1,
-#include "llvm/Support/CommandLine.h"
-cl::opt<bool> ENABLECRAZYHACK("enable-smarter-addr-folding", cl::Hidden);
-
-
/// IsProfitableToFoldIntoAddressingMode - It is possible for the addressing
/// mode of the machine to fold the specified instruction into a load or store
/// that ultimately uses it. However, the specified instruction has multiple
@@ -1053,7 +1049,7 @@ cl::opt<bool> ENABLECRAZYHACK("enable-smarter-addr-folding", cl::Hidden);
bool AddressingModeMatcher::
IsProfitableToFoldIntoAddressingMode(Instruction *I, ExtAddrMode &AMBefore,
ExtAddrMode &AMAfter) {
- if (IgnoreProfitability || !ENABLECRAZYHACK) return true;
+ if (IgnoreProfitability) return true;
// AMBefore is the addressing mode before this instruction was folded into it,
// and AMAfter is the addressing mode after the instruction was folded. Get
diff --git a/test/CodeGen/X86/isel-sink3.ll b/test/CodeGen/X86/isel-sink3.ll
index a0fba3acc5..75c23c3435 100644
--- a/test/CodeGen/X86/isel-sink3.ll
+++ b/test/CodeGen/X86/isel-sink3.ll
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | llc -enable-smarter-addr-folding | grep {addl.(%eax), %ecx}
-; RUN: llvm-as < %s | llc -enable-smarter-addr-folding | not grep leal
+; RUN: llvm-as < %s | llc | grep {addl.(%eax), %ecx}
+; RUN: llvm-as < %s | llc | not grep leal
; this should not sink %1 into bb1, that would increase reg pressure.
; rdar://6399178