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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-04-09 00:20:42 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-04-09 00:20:42 +0000 |
| commit | da282fcf6a0176b563d7ebad142fead3b7e7865f (patch) | |
| tree | 2b9aba70829b56b7d845bd8e5ff1af704897a46c | |
| parent | b1fb1964fdbc57cf1a9c8b1d8794476d8d041681 (diff) | |
| download | llvm-da282fcf6a0176b563d7ebad142fead3b7e7865f.tar.gz llvm-da282fcf6a0176b563d7ebad142fead3b7e7865f.tar.bz2 llvm-da282fcf6a0176b563d7ebad142fead3b7e7865f.tar.xz | |
Merging r199763:
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r199763 | hfinkel | 2014-01-21 15:15:58 -0500 (Tue, 21 Jan 2014) | 9 lines
Fix pointer info on PPC byval stores
For PPC64 SVR (and Darwin), the stores that take byval aggregate parameters
from registers into the stack frame had MachinePointerInfo objects with
incorrect offsets. These offsets are relative to the object itself, not to the
stack frame base.
This fixes self hosting on PPC64 when compiling with -enable-aa-sched-mi.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@205819 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 11 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/byval-agg-info.ll | 17 |
2 files changed, 22 insertions, 6 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 8da5f0563c..25a7ca7f59 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2333,7 +2333,7 @@ PPCTargetLowering::LowerFormalArguments_64SVR4( EVT ObjType = (ObjSize == 1 ? MVT::i8 : (ObjSize == 2 ? MVT::i16 : MVT::i32)); Store = DAG.getTruncStore(Val.getValue(1), dl, Val, FIN, - MachinePointerInfo(FuncArg, CurArgOffset), + MachinePointerInfo(FuncArg), ObjType, false, false, 0); } else { // For sizes that don't fit a truncating store (3, 5, 6, 7), @@ -2345,7 +2345,7 @@ PPCTargetLowering::LowerFormalArguments_64SVR4( int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset, true); SDValue FIN = DAG.getFrameIndex(FI, PtrVT); Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, - MachinePointerInfo(FuncArg, ArgOffset), + MachinePointerInfo(FuncArg), false, false, 0); } @@ -2369,7 +2369,7 @@ PPCTargetLowering::LowerFormalArguments_64SVR4( SDValue FIN = DAG.getFrameIndex(FI, PtrVT); SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, - MachinePointerInfo(FuncArg, ArgOffset), + MachinePointerInfo(FuncArg, j), false, false, 0); MemOps.push_back(Store); ++GPR_idx; @@ -2665,8 +2665,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin( SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); EVT ObjType = ObjSize == 1 ? MVT::i8 : MVT::i16; SDValue Store = DAG.getTruncStore(Val.getValue(1), dl, Val, FIN, - MachinePointerInfo(FuncArg, - CurArgOffset), + MachinePointerInfo(FuncArg), ObjType, false, false, 0); MemOps.push_back(Store); ++GPR_idx; @@ -2690,7 +2689,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin( SDValue FIN = DAG.getFrameIndex(FI, PtrVT); SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, - MachinePointerInfo(FuncArg, ArgOffset), + MachinePointerInfo(FuncArg, j), false, false, 0); MemOps.push_back(Store); ++GPR_idx; diff --git a/test/CodeGen/PowerPC/byval-agg-info.ll b/test/CodeGen/PowerPC/byval-agg-info.ll new file mode 100644 index 0000000000..89ad8e4dcf --- /dev/null +++ b/test/CodeGen/PowerPC/byval-agg-info.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -print-after=prologepilog >%t 2>&1 && FileCheck <%t %s +target datalayout = "E-m:e-i64:64-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +%struct.anon = type { i32, i32 } + +declare void @foo(%struct.anon* %v) +define void @test(i32 %a, i32 %b, %struct.anon* byval nocapture %v) { +entry: + call void @foo(%struct.anon* %v) + ret void +} + +; Make sure that the MMO on the store has no offset from the byval +; variable itself (we used to have mem:ST8[%v+64]). +; CHECK: STD %X5<kill>, 176, %X1; mem:ST8[%v](align=16) + |