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| author | Eli Friedman <eli.friedman@gmail.com> | 2011-07-25 22:25:42 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2011-07-25 22:25:42 +0000 |
| commit | ed4b4272ba2c2ff68f839738ba8147c3606d8885 (patch) | |
| tree | 2f7399cf0ef27da33c15223a8a53ca4a888d1a28 | |
| parent | a26ec886a3a4d9d317262861d7a3de4f64bad71c (diff) | |
| download | llvm-ed4b4272ba2c2ff68f839738ba8147c3606d8885.tar.gz llvm-ed4b4272ba2c2ff68f839738ba8147c3606d8885.tar.bz2 llvm-ed4b4272ba2c2ff68f839738ba8147c3606d8885.tar.xz | |
Make sure this DAGCombine actually returns an UNDEF of the correct type; PR10476.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135993 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/extractelement-load.ll | 20 |
2 files changed, 19 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 5a7319f9d6..51aca66eef 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -6896,7 +6896,7 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) { // If Idx was -1 above, Elt is going to be -1, so just return undef. if (Elt == -1) - return DAG.getUNDEF(LN0->getBasePtr().getValueType()); + return DAG.getUNDEF(LVT); unsigned Align = LN0->getAlignment(); if (NewLoad) { diff --git a/test/CodeGen/X86/extractelement-load.ll b/test/CodeGen/X86/extractelement-load.ll index ee57d9b762..06d739ceed 100644 --- a/test/CodeGen/X86/extractelement-load.ll +++ b/test/CodeGen/X86/extractelement-load.ll @@ -1,9 +1,25 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=yonah | not grep movd -; RUN: llc < %s -march=x86-64 -mattr=+sse2 -mcpu=core2 | not grep movd +; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=yonah | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+sse2 -mcpu=core2 | FileCheck %s define i32 @t(<2 x i64>* %val) nounwind { +; CHECK: t: +; CHECK-NOT: movd +; CHECK: movl 8( +; CHECK-NEXT: ret %tmp2 = load <2 x i64>* %val, align 16 ; <<2 x i64>> [#uses=1] %tmp3 = bitcast <2 x i64> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp4 = extractelement <4 x i32> %tmp3, i32 2 ; <i32> [#uses=1] ret i32 %tmp4 } + +; Case where extractelement of load ends up as undef. +; (Making sure this doesn't crash.) +define i32 @t2(<8 x i32>* %xp) { +; CHECK: t2: +; CHECK: ret + %x = load <8 x i32>* %xp + %Shuff68 = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> <i32 +undef, i32 7, i32 9, i32 undef, i32 13, i32 15, i32 1, i32 3> + %y = extractelement <8 x i32> %Shuff68, i32 0 + ret i32 %y +} |