diff options
author | Hal Finkel <hfinkel@anl.gov> | 2013-04-07 05:46:58 +0000 |
---|---|---|
committer | Hal Finkel <hfinkel@anl.gov> | 2013-04-07 05:46:58 +0000 |
commit | fa1d102a052e0375c954d9a35b3a687f81194f7a (patch) | |
tree | 3637a5cc923da164f6a58340388bde870940a07b | |
parent | aecbe2426825463c183a036da4bfae621e8ec080 (diff) | |
download | llvm-fa1d102a052e0375c954d9a35b3a687f81194f7a.tar.gz llvm-fa1d102a052e0375c954d9a35b3a687f81194f7a.tar.bz2 llvm-fa1d102a052e0375c954d9a35b3a687f81194f7a.tar.xz |
PPC pre-increment load instructions do not have side effects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178972 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/PowerPC/PPCInstr64Bit.td | 4 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td index 6536ea4651..16b983f8a5 100644 --- a/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/lib/Target/PowerPC/PPCInstr64Bit.td @@ -594,7 +594,7 @@ def LWZX8 : XForm_1<31, 23, (outs G8RC:$rD), (ins memrr:$src), // Update forms. -let mayLoad = 1 in { +let mayLoad = 1, neverHasSideEffects = 1 in { def LBZU8 : DForm_1<35, (outs G8RC:$rD, ptr_rc_nor0:$ea_result), (ins memri:$addr), "lbzu $rD, $addr", LdStLoadUpd, []>, RegConstraint<"$addr.reg = $ea_result">, @@ -666,7 +666,7 @@ def LDBRX : XForm_1<31, 532, (outs G8RC:$rD), (ins memrr:$src), "ldbrx $rD, $src", LdStLoad, [(set i64:$rD, (PPClbrx xoaddr:$src, i64))]>, isPPC64; -let mayLoad = 1 in +let mayLoad = 1, neverHasSideEffects = 1 in def LDU : DSForm_1<58, 1, (outs G8RC:$rD, ptr_rc_nor0:$ea_result), (ins memrix:$addr), "ldu $rD, $addr", LdStLDU, []>, RegConstraint<"$addr.reg = $ea_result">, isPPC64, diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 86d020be4d..14f35ef064 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -757,7 +757,7 @@ def LFD : DForm_1<50, (outs F8RC:$rD), (ins memri:$src), // Unindexed (r+i) Loads with Update (preinc). -let mayLoad = 1 in { +let mayLoad = 1, neverHasSideEffects = 1 in { def LBZU : DForm_1<35, (outs GPRC:$rD, ptr_rc_nor0:$ea_result), (ins memri:$addr), "lbzu $rD, $addr", LdStLoadUpd, []>, RegConstraint<"$addr.reg = $ea_result">, |