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author | Devang Patel <dpatel@apple.com> | 2009-01-05 17:31:22 +0000 |
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committer | Devang Patel <dpatel@apple.com> | 2009-01-05 17:31:22 +0000 |
commit | 8a84e4402a1ab7ff36f52acdf5e1891e283a947e (patch) | |
tree | e10fab3f772d2a848ee01ce0b7658752913cd1cc | |
parent | 8f56ebaf5cdd9e1c6579e0d637ccc65c6aea0726 (diff) | |
download | llvm-8a84e4402a1ab7ff36f52acdf5e1891e283a947e.tar.gz llvm-8a84e4402a1ab7ff36f52acdf5e1891e283a947e.tar.bz2 llvm-8a84e4402a1ab7ff36f52acdf5e1891e283a947e.tar.xz |
squash warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61707 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp | 1 | ||||
-rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 2 | ||||
-rw-r--r-- | lib/Target/DarwinTargetAsmInfo.cpp | 1 | ||||
-rw-r--r-- | lib/Target/ELFTargetAsmInfo.cpp | 2 | ||||
-rw-r--r-- | lib/Target/TargetAsmInfo.cpp | 1 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
-rw-r--r-- | lib/Target/X86/X86TargetAsmInfo.cpp | 1 |
7 files changed, 8 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp index 3daa79ed71..4f17164ce6 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp @@ -2019,6 +2019,7 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &SI) { size_t numCmps = Clusterify(Cases, SI); DEBUG(errs() << "Clusterify finished. Total clusters: " << Cases.size() << ". Total compares: " << numCmps << '\n'); + numCmps = 0; // Get the Value to be switched on and default basic blocks, which will be // inserted into CaseBlock records, representing basic blocks in the binary diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index cfac82613f..cfc77eef04 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -1662,7 +1662,7 @@ bool SimpleRegisterCoalescing::SimpleJoin(LiveInterval &LHS, LiveInterval &RHS){ // optimize for it: if there is more than one value, we merge them all into // the lowest numbered one, then handle the interval as if we were merging // with one value number. - VNInfo *LHSValNo; + VNInfo *LHSValNo = NULL; if (EliminatedLHSVals.size() > 1) { // Loop through all the equal value numbers merging them into the smallest // one. diff --git a/lib/Target/DarwinTargetAsmInfo.cpp b/lib/Target/DarwinTargetAsmInfo.cpp index cb73d31d4b..7121cab493 100644 --- a/lib/Target/DarwinTargetAsmInfo.cpp +++ b/lib/Target/DarwinTargetAsmInfo.cpp @@ -108,6 +108,7 @@ DarwinTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const { } // FIXME: Do we have any extra special weird cases? + return NULL; } const Section* diff --git a/lib/Target/ELFTargetAsmInfo.cpp b/lib/Target/ELFTargetAsmInfo.cpp index 47727d111f..76e0b1b4af 100644 --- a/lib/Target/ELFTargetAsmInfo.cpp +++ b/lib/Target/ELFTargetAsmInfo.cpp @@ -86,6 +86,8 @@ ELFTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const { } } else assert(0 && "Unsupported global"); + + return NULL; } const Section* diff --git a/lib/Target/TargetAsmInfo.cpp b/lib/Target/TargetAsmInfo.cpp index 5cf298aa95..0cf969cf3a 100644 --- a/lib/Target/TargetAsmInfo.cpp +++ b/lib/Target/TargetAsmInfo.cpp @@ -342,6 +342,7 @@ TargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV, default: assert(0 && "Unknown section kind"); } + return NULL; } const Section* diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 5ed6342bb1..c282f918ea 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1255,7 +1255,7 @@ X86TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) { if (VA.isRegLoc()) { MVT RegVT = VA.getLocVT(); - TargetRegisterClass *RC; + TargetRegisterClass *RC = NULL; if (RegVT == MVT::i32) RC = X86::GR32RegisterClass; else if (Is64Bit && RegVT == MVT::i64) diff --git a/lib/Target/X86/X86TargetAsmInfo.cpp b/lib/Target/X86/X86TargetAsmInfo.cpp index de655e732b..1cf859b3b8 100644 --- a/lib/Target/X86/X86TargetAsmInfo.cpp +++ b/lib/Target/X86/X86TargetAsmInfo.cpp @@ -319,6 +319,7 @@ X86COFFTargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV, default: assert(0 && "Unknown section kind"); } + return NULL; } std::string X86COFFTargetAsmInfo::printSectionFlags(unsigned flags) const { |