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| author | Hal Finkel <hfinkel@anl.gov> | 2012-11-20 04:22:44 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-11-20 04:22:44 +0000 |
| commit | a4652365e3044f6bc3627bb23a1648bb32d87809 (patch) | |
| tree | d6bacecbb077f16a6c084f88a819bf879f5abac0 | |
| parent | 3c221ac6795fd523c7b30846a26de1479ee14c73 (diff) | |
| download | llvm-a4652365e3044f6bc3627bb23a1648bb32d87809.tar.gz llvm-a4652365e3044f6bc3627bb23a1648bb32d87809.tar.bz2 llvm-a4652365e3044f6bc3627bb23a1648bb32d87809.tar.xz | |
Merge in PPC release notes: r168189 and r168352.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_32@168353 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | docs/ReleaseNotes.html | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html index fc3a8b71bd..88fb12064b 100644 --- a/docs/ReleaseNotes.html +++ b/docs/ReleaseNotes.html @@ -647,6 +647,46 @@ Release Notes</a>.</h1> <!--=========================================================================--> <h3> +<a name="PowerPC">PowerPC Target Improvements</a> +</h3> + +<div> + +<ul> +<p>Many fixes and changes across LLVM (and Clang) for better compliance with + the 64-bit PowerPC ELF Application Binary Interface, interoperability with + GCC, and overall 64-bit PowerPC support. Some highlights include:</p> +<ul> + <li> MCJIT support added.</li> + <li> PPC64 relocation support and (small code model) TOC handling + added.</li> + <li> Parameter passing and return value fixes (alignment issues, + padding, varargs support, proper register usage, odd-sized + structure support, float support, extension of return values + for i32 return values).</li> + <li> Fixes in spill and reload code for vector registers.</li> + <li> C++ exception handling enabled.</li> + <li> Changes to remediate double-rounding compatibility issues with + respect to GCC behavior.</li> + <li> Refactoring to disentangle ppc64-elf-linux ABI from Darwin + ppc64 ABI support.</li> + <li> Assorted new test cases and test case fixes (endian and word + size issues).</li> + <li> Fixes for big-endian codegen bugs, instruction encodings, and + instruction constraints.</li> + <li> Implemented -integrated-as support.</li> + <li> Additional support for Altivec compare operations.</li> + <li> IBM long double support.</li> +</ul> +<p>There have also been code generation improvements for both 32- and 64-bit + code. Instruction scheduling support for the Freescale e500mc and e5500 + cores has been added.</p> +</ul> + +</div> + +<!--=========================================================================--> +<h3> <a name="OtherTS">Other Target Specific Improvements</a> </h3> |