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| author | David Woodhouse <dwmw2@infradead.org> | 2014-01-28 23:13:30 +0000 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2014-01-28 23:13:30 +0000 |
| commit | 634295bcb62646ea75dfe2248dc5a9d4b9d33ff1 (patch) | |
| tree | c33649afb1ef01ad25452bcdb820732e90e94242 | |
| parent | eab5cc34c6d13d56ecc59153598695a6ff8d3e14 (diff) | |
| download | llvm-634295bcb62646ea75dfe2248dc5a9d4b9d33ff1.tar.gz llvm-634295bcb62646ea75dfe2248dc5a9d4b9d33ff1.tar.bz2 llvm-634295bcb62646ea75dfe2248dc5a9d4b9d33ff1.tar.xz | |
Tests for mode switching
1. test that inlineasm works
2. test that relaxable instructions are re-encoded in the correct mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200351 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | test/CodeGen/ARM/inlineasm-mode-switch.ll | 23 | ||||
| -rw-r--r-- | test/MC/ARM/fixup-cpu-mode.s | 9 | ||||
| -rw-r--r-- | test/MC/X86/fixup-cpu-mode.s | 8 |
3 files changed, 40 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/inlineasm-mode-switch.ll b/test/CodeGen/ARM/inlineasm-mode-switch.ll new file mode 100644 index 0000000000..8c21bca86d --- /dev/null +++ b/test/CodeGen/ARM/inlineasm-mode-switch.ll @@ -0,0 +1,23 @@ +; RUN: llc < %s -mtriple thumbv7-linux -filetype=obj -o %t +; Two pass decoding needed because llvm-objdump does not respect mapping symbols +; RUN: llvm-objdump -triple thumbv7-linux -d %t | FileCheck --check-prefix=THUMB %s +; RUN: llvm-objdump -triple armv7-linux -d %t | FileCheck --check-prefix=ARM %s + +; THUMB: foo: +; THUMB: a: 18 47 bx r3 +; THUMB: 28: 70 47 bx lr + +; ARM: foo: +; ARM: 10: 04 70 2d e5 str r7, [sp, #-4]! + +define void @foo(i8* %start, i64 %size) { +entry: + %0 = ptrtoint i8* %start to i32 + %conv = zext i32 %0 to i64 + %add = add i64 %conv, %size + %conv1 = trunc i64 %add to i32 + %1 = tail call i32 asm sideeffect "@ Enter ARM Mode \0A\09adr r3, 1f \0A\09bx r3 \0A\09.align 4 \0A\09.arm \0A1: push {r7} \0A\09mov r7, $4 \0A\09add r1, r2, r3 \0A\09pop {r7} \0A\09@ Enter THUMB Mode\0A\09adr r3, 2f+1 \0A\09bx r3 \0A\09.thumb \0A2: \0A\09", "={r0},{r0},{r1},{r2},r,~{r3}"(i32 %0, i32 %conv1, i32 0, i32 254) + ret void +} + + diff --git a/test/MC/ARM/fixup-cpu-mode.s b/test/MC/ARM/fixup-cpu-mode.s new file mode 100644 index 0000000000..17f29f94d2 --- /dev/null +++ b/test/MC/ARM/fixup-cpu-mode.s @@ -0,0 +1,9 @@ +// RUN: llvm-mc -filetype=obj -triple thumbv7-linux-gnu %s -o %t +// RUN: llvm-objdump -triple thumbv7-linux-gnu -d %t | FileCheck %s + +//PR18303 +.code 16 +.global edata +b edata // CHECK: b.w +.code 32 + diff --git a/test/MC/X86/fixup-cpu-mode.s b/test/MC/X86/fixup-cpu-mode.s new file mode 100644 index 0000000000..13e0d46215 --- /dev/null +++ b/test/MC/X86/fixup-cpu-mode.s @@ -0,0 +1,8 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t +// RUN: llvm-objdump -d %t | FileCheck %s + +//PR18303 +.global edata +sub $edata, %r12 // CHECK: subq $0, %r12 +.code32 + |