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authorJim Grosbach <grosbach@apple.com>2011-03-11 18:00:42 +0000
committerJim Grosbach <grosbach@apple.com>2011-03-11 18:00:42 +0000
commiteb582d7ba202e06ea339def0b610bc31565250da (patch)
treef8b38ff4236ff1a6b20c50ab8a24828f437cad22
parent778583ad2864949388a1cc645704f9ee76c9c0b9 (diff)
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Fix MOVCCi32imm to be have ARM-mode Requires and a proper size (8 bytes, was 4).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127469 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index df270ad0c4..b6c447bb5c 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -3178,9 +3178,9 @@ def MOVCCi : ARMPseudoInst<(outs GPR:$Rd),
// Two instruction predicate mov immediate.
let isMoveImm = 1 in
-def MOVCCi32imm : PseudoInst<(outs GPR:$Rd),
- (ins GPR:$false, i32imm:$src, pred:$p),
- IIC_iCMOVix2, []>, RegConstraint<"$false = $Rd">;
+def MOVCCi32imm : ARMPseudoInst<(outs GPR:$Rd),
+ (ins GPR:$false, i32imm:$src, pred:$p),
+ Size8Bytes, IIC_iCMOVix2, []>, RegConstraint<"$false = $Rd">;
let isMoveImm = 1 in
def MVNCCi : AI1<0b1111, (outs GPR:$Rd),