diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-02-08 17:33:45 +0000 |
---|---|---|
committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-02-08 17:33:45 +0000 |
commit | 3fd3a840c50fe4ede1b200be18990bc955c536fd (patch) | |
tree | 498b8f8c0adcb14845ec705c65ff25b5163d03e8 /include/llvm/CodeGen/LiveIntervalAnalysis.h | |
parent | 90a468c424f7d0a85b3dc783634106d9a46d6688 (diff) | |
download | llvm-3fd3a840c50fe4ede1b200be18990bc955c536fd.tar.gz llvm-3fd3a840c50fe4ede1b200be18990bc955c536fd.tar.bz2 llvm-3fd3a840c50fe4ede1b200be18990bc955c536fd.tar.xz |
Keep track of register masks in LiveIntervalAnalysis.
Build an ordered vector of register mask operands (i.e., calls) when
computing live intervals. Provide a checkRegMaskInterference() function
that computes a bit mask of usable registers for a live range.
This is a quick way of determining of a live range crosses any calls,
and restricting it to the callee saved registers if it does.
Previously, we had to discover call clobbers for each candidate register
independently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150077 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/LiveIntervalAnalysis.h')
-rw-r--r-- | include/llvm/CodeGen/LiveIntervalAnalysis.h | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h index fe224e497f..5610ed63c5 100644 --- a/include/llvm/CodeGen/LiveIntervalAnalysis.h +++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h @@ -63,6 +63,25 @@ namespace llvm { /// allocatableRegs_ - A bit vector of allocatable registers. BitVector allocatableRegs_; + /// RegMaskSlots - Sorted list of instructions with register mask operands. + /// Always use the 'r' slot, RegMasks are normal clobbers, not early + /// clobbers. + SmallVector<SlotIndex, 8> RegMaskSlots; + + /// RegMaskBits - This vector is parallel to RegMaskSlots, it holds a + /// pointer to the corresponding register mask. This pointer can be + /// recomputed as: + /// + /// MI = Indexes->getInstructionFromIndex(RegMaskSlot[N]); + /// unsigned OpNum = findRegMaskOperand(MI); + /// RegMaskBits[N] = MI->getOperand(OpNum).getRegMask(); + /// + /// This is kept in a separate vector partly because some standard + /// libraries don't support lower_bound() with mixed objects, partly to + /// improve locality when searching in RegMaskSlots. + /// Also see the comment in LiveInterval::find(). + SmallVector<const uint32_t*, 8> RegMaskBits; + public: static char ID; // Pass identification, replacement for typeid LiveIntervals() : MachineFunctionPass(ID) { @@ -249,6 +268,30 @@ namespace llvm { /// point can be above or below mi, but must be in the same basic block. void moveInstr(MachineBasicBlock::iterator insertPt, MachineInstr* mi); + // Register mask functions. + // + // Machine instructions may use a register mask operand to indicate that a + // large number of registers are clobbered by the instruction. This is + // typically used for calls. + // + // For compile time performance reasons, these clobbers are not recorded in + // the live intervals for individual physical registers. Instead, + // LiveIntervalAnalysis maintains a sorted list of instructions with + // register mask operands. + + /// getRegMaskSlots - Returns asorted array of slot indices of all + /// instructions with register mask operands. + ArrayRef<SlotIndex> getRegMaskSlots() const { return RegMaskSlots; } + + /// checkRegMaskInterference - Test if LI is live across any register mask + /// instructions, and compute a bit mask of physical registers that are not + /// clobbered by any of them. + /// + /// Returns false if LI doesn't cross any register mask instructions. In + /// that case, the bit vector is not filled in. + bool checkRegMaskInterference(LiveInterval &LI, + BitVector &UsableRegs); + private: /// computeIntervals - Compute live intervals. void computeIntervals(); |