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| author | Andrew Trick <atrick@apple.com> | 2012-03-09 00:52:20 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-03-09 00:52:20 +0000 |
| commit | d04ec0c855176ebddd459c044bdd24f49938fae4 (patch) | |
| tree | f0219c0b5b7902833d3d5846592cd36f8b7740f4 /include/llvm/CodeGen/MachineScheduler.h | |
| parent | f91a330329aecec00a322ccf4b0438ffbd620574 (diff) | |
| download | llvm-d04ec0c855176ebddd459c044bdd24f49938fae4.tar.gz llvm-d04ec0c855176ebddd459c044bdd24f49938fae4.tar.bz2 llvm-d04ec0c855176ebddd459c044bdd24f49938fae4.tar.xz | |
misched: allow the default scheduler to be one chosen by the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152360 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/MachineScheduler.h')
| -rw-r--r-- | include/llvm/CodeGen/MachineScheduler.h | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/include/llvm/CodeGen/MachineScheduler.h b/include/llvm/CodeGen/MachineScheduler.h index aded11fb65..e852009f7e 100644 --- a/include/llvm/CodeGen/MachineScheduler.h +++ b/include/llvm/CodeGen/MachineScheduler.h @@ -15,8 +15,12 @@ // return new CustomMachineScheduler(C); // } // static MachineSchedRegistry -// SchedDefaultRegistry("custom", "Run my target's custom scheduler", -// createCustomMachineSched); +// SchedCustomRegistry("custom", "Run my target's custom scheduler", +// createCustomMachineSched); +// +// Inside <Target>PassConfig: +// enablePass(MachineSchedulerID); +// MachineSchedRegistry::setDefault(createCustomMachineSched); // //===----------------------------------------------------------------------===// @@ -39,10 +43,11 @@ struct MachineSchedContext { MachineFunction *MF; const MachineLoopInfo *MLI; const MachineDominatorTree *MDT; + const TargetPassConfig *PassConfig; AliasAnalysis *AA; LiveIntervals *LIS; - MachineSchedContext(): MF(0), MLI(0), MDT(0), AA(0), LIS(0) {} + MachineSchedContext(): MF(0), MLI(0), MDT(0), PassConfig(0), AA(0), LIS(0) {} }; /// MachineSchedRegistry provides a selection of available machine instruction |