Temporarily restore the scavenger implicit_def checking code. MachineOperand isUndef mark is not being put on implicit_def of physical registers (created for parameter passing, etc.).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74519 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 13 insertions, 2 deletions

diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h
index 458c2e4487..a4ed0129eb 100644
--- a/include/llvm/CodeGen/RegisterScavenging.h
+++ b/include/llvm/CodeGen/RegisterScavenging.h
@@ -69,6 +69,10 @@ class RegScavenger {
   /// available, unset means the register is currently being used.
   BitVector RegsAvailable;
 
+  /// ImplicitDefed - If bit is set that means the register is defined by an
+  /// implicit_def instructions. That means it can be clobbered at will.
+  BitVector ImplicitDefed;
+
   /// CurrDist - Distance from MBB entry to the current instruction MBBI.
   ///
   unsigned CurrDist;
@@ -113,18 +117,25 @@ public:
   bool isUsed(unsigned Reg) const   { return !RegsAvailable[Reg]; }
   bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; }
 
+  bool isImplicitlyDefined(unsigned Reg) const { return ImplicitDefed[Reg]; }
+
   /// getRegsUsed - return all registers currently in use in used.
   void getRegsUsed(BitVector &used, bool includeReserved);
 
   /// setUsed / setUnused - Mark the state of one or a number of registers.
   ///
-  void setUsed(unsigned Reg);
-  void setUsed(BitVector &Regs) {
+  void setUsed(unsigned Reg, bool ImpDef = false);
+  void setUsed(BitVector &Regs, bool ImpDef = false) {
     RegsAvailable &= ~Regs;
+    if (ImpDef)
+      ImplicitDefed |= Regs;
+    else
+      ImplicitDefed &= ~Regs;
   }
   void setUnused(unsigned Reg, const MachineInstr *MI);
   void setUnused(BitVector &Regs) {
     RegsAvailable |= Regs;
+    ImplicitDefed &= ~Regs;
   }
 
   /// FindUnusedReg - Find a unused register of the specified register class