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| author | Andrew Trick <atrick@apple.com> | 2013-01-09 03:36:49 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-01-09 03:36:49 +0000 |
| commit | 47579cf390c42e0577519e0a2b6044baece9df00 (patch) | |
| tree | 2744c5de5c5c825a168a20f90b9e099d8feaaf88 /include/llvm/CodeGen/TargetSchedule.h | |
| parent | 2af949ddddfaf2feb4a446c754e09d2d8c207ce4 (diff) | |
| download | llvm-47579cf390c42e0577519e0a2b6044baece9df00.tar.gz llvm-47579cf390c42e0577519e0a2b6044baece9df00.tar.bz2 llvm-47579cf390c42e0577519e0a2b6044baece9df00.tar.xz | |
MIsched: add an ILP window property to machine model.
This was an experimental option, but needs to be defined
per-target. e.g. PPC A2 needs to aggressively hide latency.
I converted some in-order scheduling tests to A2. Hal is working on
more test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171946 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/TargetSchedule.h')
| -rw-r--r-- | include/llvm/CodeGen/TargetSchedule.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/TargetSchedule.h b/include/llvm/CodeGen/TargetSchedule.h index 4c4a2a8b95..484d7e200a 100644 --- a/include/llvm/CodeGen/TargetSchedule.h +++ b/include/llvm/CodeGen/TargetSchedule.h @@ -84,6 +84,9 @@ public: /// \brief Maximum number of micro-ops that may be scheduled per cycle. unsigned getIssueWidth() const { return SchedModel.IssueWidth; } + /// \brief Number of cycles the OOO processor is expected to hide. + unsigned getILPWindow() const { return SchedModel.ILPWindow; } + /// \brief Return the number of issue slots required for this MI. unsigned getNumMicroOps(const MachineInstr *MI, const MCSchedClassDesc *SC = 0) const; |