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| author | Andrew Trick <atrick@apple.com> | 2012-11-06 07:10:38 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-11-06 07:10:38 +0000 |
| commit | 8d4abb2446f80986ad5136bbec30c5da18cd6f4b (patch) | |
| tree | a4337cf1caade4cd909ac3244330c83e838d7129 /include/llvm/MC | |
| parent | 2276453e2be12badb07f84f8be9cf89626da48b6 (diff) | |
| download | llvm-8d4abb2446f80986ad5136bbec30c5da18cd6f4b.tar.gz llvm-8d4abb2446f80986ad5136bbec30c5da18cd6f4b.tar.bz2 llvm-8d4abb2446f80986ad5136bbec30c5da18cd6f4b.tar.xz | |
misched: TargetSchedule interface for machine resources.
Expose the processor resources defined by the machine model to the
scheduler and other clients through the TargetSchedule interface.
Normalize each resource count with respect to other kinds of
resources. This allows scheduling heuristics to balance resources
against other kinds of resources and latency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167444 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/MC')
| -rw-r--r-- | include/llvm/MC/MCSchedule.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/llvm/MC/MCSchedule.h b/include/llvm/MC/MCSchedule.h index c9a060c79b..0c71ee5135 100644 --- a/include/llvm/MC/MCSchedule.h +++ b/include/llvm/MC/MCSchedule.h @@ -219,6 +219,10 @@ public: /// Does this machine model include instruction-level scheduling. bool hasInstrSchedModel() const { return SchedClassTable; } + unsigned getNumProcResourceKinds() const { + return NumProcResourceKinds; + } + const MCProcResourceDesc *getProcResource(unsigned ProcResourceIdx) const { assert(hasInstrSchedModel() && "No scheduling machine model"); |