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authorEvan Cheng <evan.cheng@apple.com>2010-03-23 20:33:48 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-03-23 20:33:48 +0000
commit112e5e7eff408cb106386a0641db258048bcc836 (patch)
tree3a62722071784f1c4519ab87dfc3ea4797da5670 /lib/CodeGen/MachineCSE.cpp
parentdf9a4f0591e3f3e7ae3b3c119a0c8cf678594f6b (diff)
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Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99319 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineCSE.cpp')
-rw-r--r--lib/CodeGen/MachineCSE.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/CodeGen/MachineCSE.cpp b/lib/CodeGen/MachineCSE.cpp
index 91d3635882..355acfcd46 100644
--- a/lib/CodeGen/MachineCSE.cpp
+++ b/lib/CodeGen/MachineCSE.cpp
@@ -117,17 +117,15 @@ bool MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
MachineBasicBlock::const_iterator I,
MachineBasicBlock::const_iterator E) {
unsigned LookAheadLeft = 5;
- while (LookAheadLeft--) {
+ while (LookAheadLeft) {
if (I == E)
// Reached end of block, register is obviously dead.
return true;
- if (I->isDebugValue()) {
- // These must not count against the limit.
- ++LookAheadLeft;
+ // Skip over dbg_value's.
+ while (I->isDebugValue())
++I;
- continue;
- }
+
bool SeenDef = false;
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = I->getOperand(i);
@@ -143,6 +141,8 @@ bool MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
// See a def of Reg (or an alias) before encountering any use, it's
// trivially dead.
return true;
+
+ --LookAheadLeft;
++I;
}
return false;