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authorPekka Jaaskelainen <pekka.jaaskelainen@tut.fi>2013-10-15 14:18:10 +0000
committerPekka Jaaskelainen <pekka.jaaskelainen@tut.fi>2013-10-15 14:18:10 +0000
commit862385112e4f81ca2e1ffb3e995c223ffd5328b7 (patch)
treed382da5111d259d34bc5a20bb61fa9c4062adc2c /lib/CodeGen/MachineInstr.cpp
parent62e87cb2415b305ca9b888a2338a6af59e74005d (diff)
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Do not assert when trying to add a meta data operand with
MachineInstr::addOperand(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192707 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
-rw-r--r--lib/CodeGen/MachineInstr.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index a123e36e96..488516385d 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -647,11 +647,12 @@ void MachineInstr::addOperand(MachineFunction &MF, const MachineOperand &Op) {
}
}
+ bool isMetaDataOp = Op.getType() == MachineOperand::MO_Metadata;
// OpNo now points as the desired insertion point. Unless this is a variadic
// instruction, only implicit regs are allowed beyond MCID->getNumOperands().
// RegMask operands go between the explicit and implicit operands.
assert((isImpReg || Op.isRegMask() || MCID->isVariadic() ||
- OpNo < MCID->getNumOperands()) &&
+ OpNo < MCID->getNumOperands() || isMetaDataOp) &&
"Trying to add an operand to a machine instr that is already done!");
MachineRegisterInfo *MRI = getRegInfo();