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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-08-28 18:05:48 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-08-28 18:05:48 +0000
commit190e342cbcb1456ebb21b53a35cfefa99435bd65 (patch)
treefa78bef29a63dfa33b02887b78932fa4f18cc5d0 /lib/CodeGen/MachineInstr.cpp
parent96da080b88472efa098e8a004bd205713c89e513 (diff)
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Don't allow TargetFlags on MO_Register MachineOperands.
Register operands are manipulated by a lot of target-independent code, and it is not always possible to preserve target flags. That means it is not safe to use target flags on register operands. None of the targets in the tree are using register operand target flags. External targets should be using immediate operands to annotate instructions with operand modifiers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162770 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
-rw-r--r--lib/CodeGen/MachineInstr.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index b166849946..e1060046e2 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -208,8 +208,8 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
hash_code llvm::hash_value(const MachineOperand &MO) {
switch (MO.getType()) {
case MachineOperand::MO_Register:
- return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getReg(),
- MO.getSubReg(), MO.isDef());
+ // Register operands don't have target flags.
+ return hash_combine(MO.getType(), MO.getReg(), MO.getSubReg(), MO.isDef());
case MachineOperand::MO_Immediate:
return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getImm());
case MachineOperand::MO_CImmediate: