summaryrefslogtreecommitdiff
path: root/lib/CodeGen/MachineInstrBundle.cpp
diff options
context:
space:
mode:
authorTim Northover <Tim.Northover@arm.com>2012-11-20 09:56:11 +0000
committerTim Northover <Tim.Northover@arm.com>2012-11-20 09:56:11 +0000
commit310f248c22c5a20eaa4de1e612af3338a89144f3 (patch)
tree3e4fc3bb0a0e1b1d85dfd2d38284f0c44f494f8a /lib/CodeGen/MachineInstrBundle.cpp
parent4fe5405bdd2c76108e2d40020374a13d243d14c2 (diff)
downloadllvm-310f248c22c5a20eaa4de1e612af3338a89144f3.tar.gz
llvm-310f248c22c5a20eaa4de1e612af3338a89144f3.tar.bz2
llvm-310f248c22c5a20eaa4de1e612af3338a89144f3.tar.xz
Fix physical register liveness calculations:
+ Take account of clobbers + Give outputs priority over inputs since they happen later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168360 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstrBundle.cpp')
-rw-r--r--lib/CodeGen/MachineInstrBundle.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/CodeGen/MachineInstrBundle.cpp b/lib/CodeGen/MachineInstrBundle.cpp
index 1f7fbfc719..70f97dedaa 100644
--- a/lib/CodeGen/MachineInstrBundle.cpp
+++ b/lib/CodeGen/MachineInstrBundle.cpp
@@ -281,7 +281,7 @@ MachineOperandIteratorBase::PhysRegInfo
MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
const TargetRegisterInfo *TRI) {
bool AllDefsDead = true;
- PhysRegInfo PRI = {false, false, false, false, false, false, false};
+ PhysRegInfo PRI = {false, false, false, false, false, false};
assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
"analyzePhysReg not given a physical register!");
@@ -305,7 +305,9 @@ MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
// Reg or a super-reg is read, and perhaps killed also.
PRI.Reads = true;
PRI.Kills = MO.isKill();
- } if (IsRegOrOverlapping && MO.readsReg()) {
+ }
+
+ if (IsRegOrOverlapping && MO.readsReg()) {
PRI.ReadsOverlap = true;// Reg or an overlapping register is read.
}