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authorAndrew Trick <atrick@apple.com>2013-08-31 05:17:58 +0000
committerAndrew Trick <atrick@apple.com>2013-08-31 05:17:58 +0000
commitc94e7b50c36ce866772e269f1541f49cbf114d27 (patch)
tree560c850f13a8ecaf1f3e5c05c3bb4c4a3bb6002f /lib/CodeGen/MachineScheduler.cpp
parentcda04f9a0a7ef0755ca36db404239346c0edb24c (diff)
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Fix my previous checkin to updatePressureDiffs.
There was one case that we could hit a DebugValue where I didn't think to check. DebugValues are evil. No checkinable test case, sorry. It's an obvious fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189717 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineScheduler.cpp')
-rw-r--r--lib/CodeGen/MachineScheduler.cpp23
1 files changed, 19 insertions, 4 deletions
diff --git a/lib/CodeGen/MachineScheduler.cpp b/lib/CodeGen/MachineScheduler.cpp
index a7a3bb8073..9e473de337 100644
--- a/lib/CodeGen/MachineScheduler.cpp
+++ b/lib/CodeGen/MachineScheduler.cpp
@@ -177,8 +177,9 @@ priorNonDebug(MachineBasicBlock::iterator I,
/// If this iterator is a debug value, increment until reaching the End or a
/// non-debug instruction.
-static MachineBasicBlock::iterator
-nextIfDebug(MachineBasicBlock::iterator I, MachineBasicBlock::iterator End) {
+static MachineBasicBlock::const_iterator
+nextIfDebug(MachineBasicBlock::const_iterator I,
+ MachineBasicBlock::const_iterator End) {
for(; I != End; ++I) {
if (!I->isDebugValue())
break;
@@ -186,6 +187,18 @@ nextIfDebug(MachineBasicBlock::iterator I, MachineBasicBlock::iterator End) {
return I;
}
+/// Non-const version.
+static MachineBasicBlock::iterator
+nextIfDebug(MachineBasicBlock::iterator I,
+ MachineBasicBlock::const_iterator End) {
+ // Cast the return value to nonconst MachineInstr, then cast to an
+ // instr_iterator, which does not check for null, finally return a
+ // bundle_iterator.
+ return MachineBasicBlock::instr_iterator(
+ const_cast<MachineInstr*>(
+ &*nextIfDebug(MachineBasicBlock::const_iterator(I), End)));
+}
+
/// Top-level MachineScheduler pass driver.
///
/// Visit blocks in function order. Divide each block into scheduling regions
@@ -565,10 +578,12 @@ void ScheduleDAGMI::updatePressureDiffs(ArrayRef<unsigned> LiveUses) {
// instruction's live-out.
const LiveInterval &LI = LIS->getInterval(Reg);
VNInfo *VNI;
- if (BotRPTracker.getPos() == BB->end())
+ MachineBasicBlock::const_iterator I =
+ nextIfDebug(BotRPTracker.getPos(), BB->end());
+ if (I == BB->end())
VNI = LI.getVNInfoBefore(LIS->getMBBEndIdx(BB));
else {
- LiveRangeQuery LRQ(LI, LIS->getInstructionIndex(BotRPTracker.getPos()));
+ LiveRangeQuery LRQ(LI, LIS->getInstructionIndex(I));
VNI = LRQ.valueIn();
}
// RegisterPressureTracker guarantees that readsReg is true for LiveUses.