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authorAndrew Trick <atrick@apple.com>2012-03-07 23:00:52 +0000
committerAndrew Trick <atrick@apple.com>2012-03-07 23:00:52 +0000
commitcf46b5acfd6e0ab5d21ec3160cec195d0eb77b0b (patch)
tree9dcc052425cd9820e062bac4d39904e2c8380ae3 /lib/CodeGen/PostRASchedulerList.cpp
parent953be893e8cffa0ef9bf410036cd96aeb526e98a (diff)
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misched prep: rename InsertPos to End.
ScheduleDAGInstrs knows nothing about how instructions will be moved or inserted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152256 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/PostRASchedulerList.cpp')
-rw-r--r--lib/CodeGen/PostRASchedulerList.cpp16
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/CodeGen/PostRASchedulerList.cpp b/lib/CodeGen/PostRASchedulerList.cpp
index cec3223ff3..c00cf0e043 100644
--- a/lib/CodeGen/PostRASchedulerList.cpp
+++ b/lib/CodeGen/PostRASchedulerList.cpp
@@ -365,8 +365,8 @@ void SchedulePostRATDList::schedule() {
if (AntiDepBreak != NULL) {
unsigned Broken =
- AntiDepBreak->BreakAntiDependencies(SUnits, Begin, InsertPos,
- InsertPosIndex, DbgValues);
+ AntiDepBreak->BreakAntiDependencies(SUnits, Begin, End, EndIndex,
+ DbgValues);
if (Broken != 0) {
// We made changes. Update the dependency graph.
@@ -396,7 +396,7 @@ void SchedulePostRATDList::schedule() {
///
void SchedulePostRATDList::Observe(MachineInstr *MI, unsigned Count) {
if (AntiDepBreak != NULL)
- AntiDepBreak->Observe(MI, Count, InsertPosIndex);
+ AntiDepBreak->Observe(MI, Count, EndIndex);
}
/// FinishBlock - Clean up register live-range state.
@@ -761,24 +761,24 @@ void SchedulePostRATDList::ListScheduleTopDown() {
// EmitSchedule - Emit the machine code in scheduled order.
void SchedulePostRATDList::EmitSchedule() {
- Begin = InsertPos;
+ Begin = End;
// If first instruction was a DBG_VALUE then put it back.
if (FirstDbgValue)
- BB->splice(InsertPos, BB, FirstDbgValue);
+ BB->splice(End, BB, FirstDbgValue);
// Then re-insert them according to the given schedule.
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
if (SUnit *SU = Sequence[i])
- BB->splice(InsertPos, BB, SU->getInstr());
+ BB->splice(End, BB, SU->getInstr());
else
// Null SUnit* is a noop.
- TII->insertNoop(*BB, InsertPos);
+ TII->insertNoop(*BB, End);
// Update the Begin iterator, as the first instruction in the block
// may have been scheduled later.
if (i == 0)
- Begin = prior(InsertPos);
+ Begin = prior(End);
}
// Reinsert any remaining debug_values.