summaryrefslogtreecommitdiff
path: root/lib/CodeGen/RegAllocBase.cpp
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-06-20 21:25:05 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-06-20 21:25:05 +0000
commitd67582e2767df96610ba8dc1835ad4bf99fc77e8 (patch)
tree911171ff0a2751f884d02c9fb2e4a806552e29ed /lib/CodeGen/RegAllocBase.cpp
parent02a227af91889d39f5e811e2e27ecce8144499eb (diff)
downloadllvm-d67582e2767df96610ba8dc1835ad4bf99fc77e8.tar.gz
llvm-d67582e2767df96610ba8dc1835ad4bf99fc77e8.tar.bz2
llvm-d67582e2767df96610ba8dc1835ad4bf99fc77e8.tar.xz
Avoid iterating with LiveIntervals::iterator.
That is a DenseMap iterator keyed by pointers, so the iteration order is nondeterministic. I would like to replace the DenseMap with an IndexedMap which doesn't allow iteration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158856 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocBase.cpp')
-rw-r--r--lib/CodeGen/RegAllocBase.cpp44
1 files changed, 25 insertions, 19 deletions
diff --git a/lib/CodeGen/RegAllocBase.cpp b/lib/CodeGen/RegAllocBase.cpp
index c542504722..f4774dcab0 100644
--- a/lib/CodeGen/RegAllocBase.cpp
+++ b/lib/CodeGen/RegAllocBase.cpp
@@ -67,18 +67,18 @@ void RegAllocBase::verify() {
}
// Verify vreg coverage.
- for (LiveIntervals::iterator liItr = LIS->begin(), liEnd = LIS->end();
- liItr != liEnd; ++liItr) {
- unsigned reg = liItr->first;
- LiveInterval* li = liItr->second;
- if (TargetRegisterInfo::isPhysicalRegister(reg)) continue;
- if (!VRM->hasPhys(reg)) continue; // spilled?
- if (li->empty()) continue; // unionVRegs will only be filled if li is
- // non-empty
- unsigned PhysReg = VRM->getPhys(reg);
- if (!unionVRegs[PhysReg].test(reg)) {
- dbgs() << "LiveVirtReg " << PrintReg(reg, TRI) << " not in union " <<
- TRI->getName(PhysReg) << "\n";
+ for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
+ unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
+ if (MRI->reg_nodbg_empty(Reg))
+ continue;
+ if (!VRM->hasPhys(Reg)) continue; // spilled?
+ LiveInterval &LI = LIS->getInterval(Reg);
+ if (LI.empty()) continue; // unionVRegs will only be filled if li is
+ // non-empty
+ unsigned PhysReg = VRM->getPhys(Reg);
+ if (!unionVRegs[PhysReg].test(Reg)) {
+ dbgs() << "LiveVirtReg " << PrintReg(Reg, TRI) << " not in union "
+ << TRI->getName(PhysReg) << "\n";
llvm_unreachable("unallocated live vreg");
}
}
@@ -117,13 +117,19 @@ void RegAllocBase::releaseMemory() {
// them on the priority queue for later assignment.
void RegAllocBase::seedLiveRegs() {
NamedRegionTimer T("Seed Live Regs", TimerGroupName, TimePassesIsEnabled);
- for (LiveIntervals::iterator I = LIS->begin(), E = LIS->end(); I != E; ++I) {
- unsigned RegNum = I->first;
- LiveInterval &VirtReg = *I->second;
- if (TargetRegisterInfo::isPhysicalRegister(RegNum))
- PhysReg2LiveUnion[RegNum].unify(VirtReg);
- else
- enqueue(&VirtReg);
+ // Physregs.
+ for (unsigned Reg = 1, e = TRI->getNumRegs(); Reg != e; ++Reg) {
+ if (!LIS->hasInterval(Reg))
+ continue;
+ PhysReg2LiveUnion[Reg].unify(LIS->getInterval(Reg));
+ }
+
+ // Virtregs.
+ for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
+ unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
+ if (MRI->reg_nodbg_empty(Reg))
+ continue;
+ enqueue(&LIS->getInterval(Reg));
}
}