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| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-27 13:00:56 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-27 13:00:56 +0000 |
| commit | 26998ee794e9b6f9b0bc27d1e273b6b78afce57d (patch) | |
| tree | 6e20bfd54a0f259fab64d0e1548874c17ef6a7ad /lib/CodeGen/RegisterScavenging.cpp | |
| parent | d6d0ebbed7ecb807e0606ac4f96af9e40202a3bb (diff) | |
| download | llvm-26998ee794e9b6f9b0bc27d1e273b6b78afce57d.tar.gz llvm-26998ee794e9b6f9b0bc27d1e273b6b78afce57d.tar.bz2 llvm-26998ee794e9b6f9b0bc27d1e273b6b78afce57d.tar.xz | |
Fix target-customized spilling in the register scavenger
This is a follow-up to r178073 (which should actually make target-customized
spilling work again).
I still don't have a regression test for this (but it would be good to have
one; Thumb 1 and Mips16 use this callback as well).
Patch by Richard Sandiford.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178137 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegisterScavenging.cpp')
| -rw-r--r-- | lib/CodeGen/RegisterScavenging.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index 6b85cd93cf..55a66ba548 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -371,7 +371,7 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC, if (Scavenged[SI].Reg == 0) break; - if (SI < Scavenged.size()) { + if (SI == Scavenged.size()) { // We need to scavenge a register but have no spill slot, the target // must know how to do it (if not, we'll assert below). Scavenged.push_back(ScavengedInfo()); |