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| author | Andrew Trick <atrick@apple.com> | 2012-03-09 04:29:02 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-03-09 04:29:02 +0000 |
| commit | 68675c6c5b173021807e4e12cd250eeba63f6d0d (patch) | |
| tree | 069ba64098a60fa02e6dfd68199c010c8c37616d /lib/CodeGen/ScheduleDAGInstrs.cpp | |
| parent | d24da97bbf86b87929ef8c57bdf3a009d48bfba7 (diff) | |
| download | llvm-68675c6c5b173021807e4e12cd250eeba63f6d0d.tar.gz llvm-68675c6c5b173021807e4e12cd250eeba63f6d0d.tar.bz2 llvm-68675c6c5b173021807e4e12cd250eeba63f6d0d.tar.xz | |
misched interface: rename Begin/End to RegionBegin/RegionEnd since they are not private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152382 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/ScheduleDAGInstrs.cpp')
| -rw-r--r-- | lib/CodeGen/ScheduleDAGInstrs.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp index 09f2c5b5de..ed06672437 100644 --- a/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -160,8 +160,8 @@ void ScheduleDAGInstrs::enterRegion(MachineBasicBlock *bb, MachineBasicBlock::iterator end, unsigned endcount) { BB = bb; - Begin = begin; - End = end; + RegionBegin = begin; + RegionEnd = end; EndIndex = endcount; // Check to see if the scheduler cares about latencies. @@ -185,7 +185,7 @@ void ScheduleDAGInstrs::exitRegion() { /// are too high to be hidden by the branch or when the liveout registers /// used by instructions in the fallthrough block. void ScheduleDAGInstrs::addSchedBarrierDeps() { - MachineInstr *ExitMI = End != BB->end() ? &*End : 0; + MachineInstr *ExitMI = RegionEnd != BB->end() ? &*RegionEnd : 0; ExitSU.setInstr(ExitMI); bool AllDepKnown = ExitMI && (ExitMI->isCall() || ExitMI->isBarrier()); @@ -477,7 +477,7 @@ void ScheduleDAGInstrs::initSUnits() { // which is contained within a basic block. SUnits.reserve(BB->size()); - for (MachineBasicBlock::iterator I = Begin; I != End; ++I) { + for (MachineBasicBlock::iterator I = RegionBegin; I != RegionEnd; ++I) { MachineInstr *MI = I; if (MI->isDebugValue()) continue; @@ -535,7 +535,7 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA) { // Walk the list of instructions, from bottom moving up. MachineInstr *PrevMI = NULL; - for (MachineBasicBlock::iterator MII = End, MIE = Begin; + for (MachineBasicBlock::iterator MII = RegionEnd, MIE = RegionBegin; MII != MIE; --MII) { MachineInstr *MI = prior(MII); if (MI && PrevMI) { |