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authorAndrew Trick <atrick@apple.com>2013-09-04 21:00:02 +0000
committerAndrew Trick <atrick@apple.com>2013-09-04 21:00:02 +0000
commit40b52bb8f2b4f63f6d99e347af0c48945f9cb4d2 (patch)
treeb8af484d8cbc0cde59a2f151d9964c3fbf6453a8 /lib/CodeGen/ScheduleDAGInstrs.cpp
parent42ebb3ad41813af292cfa681c1fe2aadd1008721 (diff)
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mi-sched: bypass heuristic checks when regpressure tracking is disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189988 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/ScheduleDAGInstrs.cpp')
-rw-r--r--lib/CodeGen/ScheduleDAGInstrs.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp
index 33cdea6f19..d940dbcf9f 100644
--- a/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -185,9 +185,6 @@ void ScheduleDAGInstrs::enterRegion(MachineBasicBlock *bb,
RegionBegin = begin;
RegionEnd = end;
NumRegionInstrs = regioninstrs;
- MISUnitMap.clear();
-
- ScheduleDAG::clearDAG();
}
/// Close the current scheduling region. Don't clear any state in case the
@@ -703,6 +700,9 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA,
: ST.useAA();
AliasAnalysis *AAForDep = UseAA ? AA : 0;
+ MISUnitMap.clear();
+ ScheduleDAG::clearDAG();
+
// Create an SUnit for each real instruction.
initSUnits();