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author | Andrew Trick <atrick@apple.com> | 2012-03-07 23:00:52 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2012-03-07 23:00:52 +0000 |
commit | cf46b5acfd6e0ab5d21ec3160cec195d0eb77b0b (patch) | |
tree | 9dcc052425cd9820e062bac4d39904e2c8380ae3 /lib/CodeGen/ScheduleDAGInstrs.cpp | |
parent | 953be893e8cffa0ef9bf410036cd96aeb526e98a (diff) | |
download | llvm-cf46b5acfd6e0ab5d21ec3160cec195d0eb77b0b.tar.gz llvm-cf46b5acfd6e0ab5d21ec3160cec195d0eb77b0b.tar.bz2 llvm-cf46b5acfd6e0ab5d21ec3160cec195d0eb77b0b.tar.xz |
misched prep: rename InsertPos to End.
ScheduleDAGInstrs knows nothing about how instructions will be moved or inserted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152256 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/ScheduleDAGInstrs.cpp')
-rw-r--r-- | lib/CodeGen/ScheduleDAGInstrs.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp index ef63776d6e..505d56c79e 100644 --- a/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -160,8 +160,8 @@ void ScheduleDAGInstrs::enterRegion(MachineBasicBlock *bb, unsigned endcount) { BB = bb; Begin = begin; - InsertPos = end; - InsertPosIndex = endcount; + End = end; + EndIndex = endcount; // Check to see if the scheduler cares about latencies. UnitLatencies = forceUnitLatencies(); @@ -184,7 +184,7 @@ void ScheduleDAGInstrs::exitRegion() { /// are too high to be hidden by the branch or when the liveout registers /// used by instructions in the fallthrough block. void ScheduleDAGInstrs::addSchedBarrierDeps() { - MachineInstr *ExitMI = InsertPos != BB->end() ? &*InsertPos : 0; + MachineInstr *ExitMI = End != BB->end() ? &*End : 0; ExitSU.setInstr(ExitMI); bool AllDepKnown = ExitMI && (ExitMI->isCall() || ExitMI->isBarrier()); @@ -476,7 +476,7 @@ void ScheduleDAGInstrs::initSUnits() { // which is contained within a basic block. SUnits.reserve(BB->size()); - for (MachineBasicBlock::iterator I = Begin; I != InsertPos; ++I) { + for (MachineBasicBlock::iterator I = Begin; I != End; ++I) { MachineInstr *MI = I; if (MI->isDebugValue()) continue; @@ -534,7 +534,7 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA) { // Walk the list of instructions, from bottom moving up. MachineInstr *PrevMI = NULL; - for (MachineBasicBlock::iterator MII = InsertPos, MIE = Begin; + for (MachineBasicBlock::iterator MII = End, MIE = Begin; MII != MIE; --MII) { MachineInstr *MI = prior(MII); if (MI && PrevMI) { |