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authorEvan Cheng <evan.cheng@apple.com>2011-12-14 02:11:42 +0000
committerEvan Cheng <evan.cheng@apple.com>2011-12-14 02:11:42 +0000
commitddfd1377d2e4154d44dc3ad217735adc15af2e3f (patch)
treef54f0541252d33b4b1d7282a033bd5d906471d69 /lib/CodeGen/ScheduleDAGInstrs.cpp
parent8f644259dc519d3ac7159e4e662fcd6bcf50cbaf (diff)
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- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def and use lists of the BUNDLE instruction) and a pass to unpack bundles. - Teach more of MachineBasic and MachineInstr methods to be bundle aware. - Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to prevent IT blocks from being broken apart. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146542 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/ScheduleDAGInstrs.cpp')
-rw-r--r--lib/CodeGen/ScheduleDAGInstrs.cpp17
1 files changed, 6 insertions, 11 deletions
diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp
index 2bb173b5c4..aedc2a13fa 100644
--- a/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -277,8 +277,9 @@ void ScheduleDAGInstrs::BuildSchedGraph(AliasAnalysis *AA) {
continue;
if (DefSU != SU &&
(Kind != SDep::Output || !MO.isDead() ||
- !DefSU->getInstr()->registerDefIsDead(Reg)))
+ !DefSU->getInstr()->registerDefIsDead(Reg))) {
DefSU->addPred(SDep(SU, Kind, AOLatency, /*Reg=*/Reg));
+ }
}
for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) {
std::vector<SUnit *> &MemDefList = Defs[*Alias];
@@ -657,22 +658,16 @@ std::string ScheduleDAGInstrs::getGraphNodeLabel(const SUnit *SU) const {
// EmitSchedule - Emit the machine code in scheduled order.
MachineBasicBlock *ScheduleDAGInstrs::EmitSchedule() {
- // For MachineInstr-based scheduling, we're rescheduling the instructions in
- // the block, so start by removing them from the block.
- while (Begin != InsertPos) {
- MachineBasicBlock::iterator I = Begin;
- ++Begin;
- BB->remove(I);
- }
+ Begin = InsertPos;
// If first instruction was a DBG_VALUE then put it back.
if (FirstDbgValue)
- BB->insert(InsertPos, FirstDbgValue);
+ BB->splice(InsertPos, BB, FirstDbgValue);
// Then re-insert them according to the given schedule.
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
if (SUnit *SU = Sequence[i])
- BB->insert(InsertPos, SU->getInstr());
+ BB->splice(InsertPos, BB, SU->getInstr());
else
// Null SUnit* is a noop.
EmitNoop();
@@ -689,7 +684,7 @@ MachineBasicBlock *ScheduleDAGInstrs::EmitSchedule() {
std::pair<MachineInstr *, MachineInstr *> P = *prior(DI);
MachineInstr *DbgValue = P.first;
MachineBasicBlock::iterator OrigPrivMI = P.second;
- BB->insertAfter(OrigPrivMI, DbgValue);
+ BB->splice(++OrigPrivMI, BB, DbgValue);
}
DbgValues.clear();
FirstDbgValue = NULL;