diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2013-08-07 22:49:12 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-08-07 22:49:12 +0000 |
| commit | 41418d17cced656f91038b2482bc9d173b4974b0 (patch) | |
| tree | ad9f68077baafc782e15513f310a8377e55c817a /lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | |
| parent | 6fa33f5dd945015d79be42c5cff146e4e2b7c4f3 (diff) | |
| download | llvm-41418d17cced656f91038b2482bc9d173b4974b0.tar.gz llvm-41418d17cced656f91038b2482bc9d173b4974b0.tar.bz2 llvm-41418d17cced656f91038b2482bc9d173b4974b0.tar.xz | |
Add ISD::FROUND for libm round()
All libm floating-point rounding functions, except for round(), had their own
ISD nodes. Recent PowerPC cores have an instruction for round(), and so here I'm
adding ISD::FROUND so that round() can be custom lowered as well.
For the most part, this is straightforward. I've added an intrinsic
and a matching ISD node just like those for nearbyint() and friends. The
SelectionDAG pattern I've named frnd (because ISD::FP_ROUND has already claimed
fround).
This will be used by the PowerPC backend in a follow-up commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187926 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp index bbe11b80da..237a33a0cf 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -241,6 +241,7 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) { case ISD::FTRUNC: case ISD::FRINT: case ISD::FNEARBYINT: + case ISD::FROUND: case ISD::FFLOOR: case ISD::FP_ROUND: case ISD::FP_EXTEND: |