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| author | Nadav Rotem <nadav.rotem@intel.com> | 2011-07-14 11:11:14 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-07-14 11:11:14 +0000 |
| commit | d0f3ef807ee4210b97a7a6bc4231e89403145b83 (patch) | |
| tree | 569c1d27bd04ca39e48a186411c540953da35ff4 /lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | |
| parent | aeb86fab3e875b6ffebea42f4f4dd3e7791ae365 (diff) | |
| download | llvm-d0f3ef807ee4210b97a7a6bc4231e89403145b83.tar.gz llvm-d0f3ef807ee4210b97a7a6bc4231e89403145b83.tar.bz2 llvm-d0f3ef807ee4210b97a7a6bc4231e89403145b83.tar.xz | |
[VECTOR-SELECT]
During type legalization we often use the SIGN_EXTEND_INREG SDNode.
When this SDNode is legalized during the LegalizeVector phase, it is
scalarized because non-simple types are automatically marked to be expanded.
In this patch we add support for lowering SIGN_EXTEND_INREG manually.
This fixes CodeGen/X86/vec_sext.ll when running with the '-promote-elements'
flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135144 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp index 5d0f923afb..ffff10ce29 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -182,9 +182,9 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) { case ISD::FRINT: case ISD::FNEARBYINT: case ISD::FFLOOR: + case ISD::SIGN_EXTEND_INREG: QueryType = Node->getValueType(0); break; - case ISD::SIGN_EXTEND_INREG: case ISD::FP_ROUND_INREG: QueryType = cast<VTSDNode>(Node->getOperand(1))->getVT(); break; |