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| author | Pete Cooper <peter_cooper@apple.com> | 2012-09-01 22:27:48 +0000 |
|---|---|---|
| committer | Pete Cooper <peter_cooper@apple.com> | 2012-09-01 22:27:48 +0000 |
| commit | d906017c1a8b5c7c49f1bc21c13e8b85306298b8 (patch) | |
| tree | 6feaebaf5ab7c300aa355fba8b97cf9e88406e8d /lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | |
| parent | 8dce5b600494a6a3e1e1b157f038d97bb3dc4aa3 (diff) | |
| download | llvm-d906017c1a8b5c7c49f1bc21c13e8b85306298b8.tar.gz llvm-d906017c1a8b5c7c49f1bc21c13e8b85306298b8.tar.bz2 llvm-d906017c1a8b5c7c49f1bc21c13e8b85306298b8.tar.xz | |
Only legalise a VSELECT in to bitwise operations if the vector mask bool is zeros or all ones. A vector bool with just ones isn't suitable for masking with.
No test case unfortunately as i couldn't find a target which fit all
the conditions needed to hit this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163075 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp index dbb2f12dea..c334f1fba5 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -514,9 +514,14 @@ SDValue VectorLegalizer::ExpandVSELECT(SDValue Op) { // AND,OR,XOR, we will have to scalarize the op. // Notice that the operation may be 'promoted' which means that it is // 'bitcasted' to another type which is handled. + // This operation also isn't safe with AND, OR, XOR when the boolean + // type is 0/1 as we need an all ones vector constant to mask with. + // FIXME: Sign extend 1 to all ones if thats legal on the target. if (TLI.getOperationAction(ISD::AND, VT) == TargetLowering::Expand || TLI.getOperationAction(ISD::XOR, VT) == TargetLowering::Expand || - TLI.getOperationAction(ISD::OR, VT) == TargetLowering::Expand) + TLI.getOperationAction(ISD::OR, VT) == TargetLowering::Expand || + TLI.getBooleanContents(true) != + TargetLowering::ZeroOrNegativeOneBooleanContent) return DAG.UnrollVectorOp(Op.getNode()); assert(VT.getSizeInBits() == Op1.getValueType().getSizeInBits() |