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| author | Devang Patel <dpatel@apple.com> | 2011-01-25 18:09:33 +0000 |
|---|---|---|
| committer | Devang Patel <dpatel@apple.com> | 2011-01-25 18:09:33 +0000 |
| commit | 3a00ffacdc49cb71baca7a17de51ff55fca119b7 (patch) | |
| tree | 4ab097b3be997f27c4ff7cdf8a2f984a30d06cdc /lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | |
| parent | b5b80a93f611ee63788b10d89989b3644642cba5 (diff) | |
| download | llvm-3a00ffacdc49cb71baca7a17de51ff55fca119b7.tar.gz llvm-3a00ffacdc49cb71baca7a17de51ff55fca119b7.tar.bz2 llvm-3a00ffacdc49cb71baca7a17de51ff55fca119b7.tar.xz | |
This assertion is too restrictive, it does not apply for dangling dbg value nodes (nodes where dbg.value intrinsic preceds use of the value).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124202 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp index 57fc0aa3f3..5d20fd70a4 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -619,16 +619,8 @@ MachineBasicBlock *ScheduleDAGSDNodes::EmitSchedule() { // Insert all SDDbgValue's whose order(s) are before "Order". if (!MI) continue; -#ifndef NDEBUG - unsigned LastDIOrder = 0; -#endif for (; DI != DE && (*DI)->getOrder() >= LastOrder && (*DI)->getOrder() < Order; ++DI) { -#ifndef NDEBUG - assert((*DI)->getOrder() >= LastDIOrder && - "SDDbgValue nodes must be in source order!"); - LastDIOrder = (*DI)->getOrder(); -#endif if ((*DI)->isInvalidated()) continue; MachineInstr *DbgMI = Emitter.EmitDbgValue(*DI, VRBaseMap); |