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author | David Goodwin <david_goodwin@apple.com> | 2009-08-13 16:05:04 +0000 |
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committer | David Goodwin <david_goodwin@apple.com> | 2009-08-13 16:05:04 +0000 |
commit | 710461688bba935f0ad5c75da7fec2ad0f225c00 (patch) | |
tree | f26db302a151e97f9a4196ec98b0df433f8ed2d8 /lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | |
parent | 524dea4d4ca6ecafa18e1e011934a2129c770f4f (diff) | |
download | llvm-710461688bba935f0ad5c75da7fec2ad0f225c00.tar.gz llvm-710461688bba935f0ad5c75da7fec2ad0f225c00.tar.bz2 llvm-710461688bba935f0ad5c75da7fec2ad0f225c00.tar.xz |
Add callback to allow target to adjust latency of schedule dependency edge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78910 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp index 0b0aa269b6..ca4ba565d4 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -18,6 +18,7 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetRegisterInfo.h" +#include "llvm/Target/TargetSubtarget.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; @@ -152,6 +153,8 @@ void ScheduleDAGSDNodes::BuildSchedUnits() { } void ScheduleDAGSDNodes::AddSchedEdges() { + const TargetSubtarget &ST = TM.getSubtarget<TargetSubtarget>(); + // Pass 2: add the preds, succs, etc. for (unsigned su = 0, e = SUnits.size(); su != e; ++su) { SUnit *SU = &SUnits[su]; @@ -206,8 +209,13 @@ void ScheduleDAGSDNodes::AddSchedEdges() { // dependency. This may change in the future though. if (Cost >= 0) PhysReg = 0; - SU->addPred(SDep(OpSU, isChain ? SDep::Order : SDep::Data, - OpSU->Latency, PhysReg)); + + const SDep& dep = SDep(OpSU, isChain ? SDep::Order : SDep::Data, + OpSU->Latency, PhysReg); + if (!isChain) + ST.adjustSchedDependency((SDep &)dep); + + SU->addPred(dep); } } } |