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| author | Andrew Trick <atrick@apple.com> | 2013-05-25 03:08:10 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-05-25 03:08:10 +0000 |
| commit | dd0fb018a7cd2214c7bc5c6c767f626f99b47ba9 (patch) | |
| tree | 50fe35710d547f4df2e5f982e0a7c32791b3d680 /lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | |
| parent | ac6d9bec671252dd1e596fa71180ff6b39d06b5d (diff) | |
| download | llvm-dd0fb018a7cd2214c7bc5c6c767f626f99b47ba9.tar.gz llvm-dd0fb018a7cd2214c7bc5c6c767f626f99b47ba9.tar.bz2 llvm-dd0fb018a7cd2214c7bc5c6c767f626f99b47ba9.tar.xz | |
Track IR ordering of SelectionDAG nodes 3/4.
Remove the old IR ordering mechanism and switch to new one. Fix unit
test failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182704 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp index b22440daf1..a5de9db6af 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -736,7 +736,7 @@ static void ProcessSourceNode(SDNode *N, SelectionDAG *DAG, DenseMap<SDValue, unsigned> &VRBaseMap, SmallVector<std::pair<unsigned, MachineInstr*>, 32> &Orders, SmallSet<unsigned, 8> &Seen) { - unsigned Order = DAG->GetOrdering(N); + unsigned Order = N->getIROrder(); if (!Order || !Seen.insert(Order)) { // Process any valid SDDbgValues even if node does not have any order // assigned. |