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authorPatrik Hagglund <patrik.h.hagglund@ericsson.com>2012-12-11 10:09:23 +0000
committerPatrik Hagglund <patrik.h.hagglund@ericsson.com>2012-12-11 10:09:23 +0000
commit2d916231ff503b995bf3b65a338c9bf0d84ee7c7 (patch)
tree5f1da0ac96c9872a0fdf19bfbbe5e5ea21dc5f94 /lib/CodeGen/SelectionDAG/TargetLowering.cpp
parent235c75cc2190c40f5785059ec1767e44da5c5401 (diff)
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Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of
EVTs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169848 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/TargetLowering.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index bffc585b35..7e741a4238 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -688,7 +688,7 @@ static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT,
if (!isPowerOf2_32(NewVTSize))
NewVTSize = NextPowerOf2(NewVTSize);
- EVT DestVT = TLI->getRegisterType(NewVT);
+ MVT DestVT = TLI->getRegisterType(NewVT);
RegisterVT = DestVT;
if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
@@ -870,7 +870,7 @@ void TargetLowering::computeRegisterProperties() {
NumRegistersForVT[i] =
getVectorTypeBreakdownMVT(VT, IntermediateVT, NumIntermediates,
RegisterVT, this);
- RegisterTypeForVT[i] = RegisterVT;
+ RegisterTypeForVT[i] = RegisterVT.getSimpleVT();
MVT NVT = VT.getPow2VectorType();
if (NVT == VT) {
@@ -1011,13 +1011,13 @@ void llvm::GetReturnInfo(Type* ReturnType, Attributes attr,
// conventions. The frontend should mark functions whose return values
// require promoting with signext or zeroext attributes.
if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) {
- EVT MinVT = TLI.getRegisterType(ReturnType->getContext(), MVT::i32);
+ MVT MinVT = TLI.getRegisterType(ReturnType->getContext(), MVT::i32);
if (VT.bitsLT(MinVT))
VT = MinVT;
}
unsigned NumParts = TLI.getNumRegisters(ReturnType->getContext(), VT);
- EVT PartVT = TLI.getRegisterType(ReturnType->getContext(), VT);
+ MVT PartVT = TLI.getRegisterType(ReturnType->getContext(), VT);
// 'inreg' on function refers to return value
ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();