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authorHal Finkel <hfinkel@anl.gov>2012-12-18 17:50:58 +0000
committerHal Finkel <hfinkel@anl.gov>2012-12-18 17:50:58 +0000
commitca2dd36c395f5ead63572d45a2106b9d34d8ca90 (patch)
tree2a974890da559c45f9ecdc5c212d6dc9ba051f5e /lib/CodeGen/SelectionDAG/TargetLowering.cpp
parent04b116e08eefe1ddd4a719889f136c624ee5914e (diff)
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Check multiple register classes for inline asm tied registers
A register can be associated with several distinct register classes. For example, on PPC, the floating point registers are each associated with both F4RC (which holds f32) and F8RC (which holds f64). As a result, this code would fail when provided with a floating point register and an f64 operand because it would happen to find the register in the F4RC class first and return that. From the F4RC class, SDAG would extract f32 as the register type and then assert because of the invalid implied conversion between the f64 value and the f32 register. Instead, search all register classes. If a register class containing the the requested register has the requested type, then return that register class. Otherwise, as before, return the first register class found that contains the requested register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170436 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/TargetLowering.cpp19
1 files changed, 16 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 2ec7e73bf1..1dadd1f25a 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -2829,6 +2829,9 @@ getRegForInlineAsmConstraint(const std::string &Constraint,
// Remove the braces from around the name.
StringRef RegName(Constraint.data()+1, Constraint.size()-2);
+ std::pair<unsigned, const TargetRegisterClass*> R =
+ std::make_pair(0u, static_cast<const TargetRegisterClass*>(0));
+
// Figure out which register class contains this reg.
const TargetRegisterInfo *RI = TM.getRegisterInfo();
for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(),
@@ -2842,12 +2845,22 @@ getRegForInlineAsmConstraint(const std::string &Constraint,
for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
I != E; ++I) {
- if (RegName.equals_lower(RI->getName(*I)))
- return std::make_pair(*I, RC);
+ if (RegName.equals_lower(RI->getName(*I))) {
+ std::pair<unsigned, const TargetRegisterClass*> S =
+ std::make_pair(*I, RC);
+
+ // If this register class has the requested value type, return it,
+ // otherwise keep searching and return the first class found
+ // if no other is found which explicitly has the requested type.
+ if (RC->hasType(VT))
+ return S;
+ else if (!R.second)
+ R = S;
+ }
}
}
- return std::make_pair(0u, static_cast<const TargetRegisterClass*>(0));
+ return R;
}
//===----------------------------------------------------------------------===//