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authorBenjamin Kramer <benny.kra@googlemail.com>2013-05-21 08:51:09 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2013-05-21 08:51:09 +0000
commitf19b8b018be4b0478f741bf35287db3488fda8d6 (patch)
treebadb6014825a9a7bd8bc2e9dcaf7a4aa37ce5972 /lib/CodeGen/SelectionDAG/TargetLowering.cpp
parent275428fe4abd4bd690456d29c7c54143d653cb4f (diff)
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DAGCombine: Avoid an edge case where it tried to create an i0 type for (x & 0) == 0.
Fixes PR16083. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182357 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/TargetLowering.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 36add03515..e8b6c04a48 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1162,7 +1162,8 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
}
// Make sure we're not losing bits from the constant.
- if (MinBits < C1.getBitWidth() && MinBits >= C1.getActiveBits()) {
+ if (MinBits > 0 &&
+ MinBits < C1.getBitWidth() && MinBits >= C1.getActiveBits()) {
EVT MinVT = EVT::getIntegerVT(*DAG.getContext(), MinBits);
if (isTypeDesirableForOp(ISD::SETCC, MinVT)) {
// Will get folded away.